SIT3521 datasheet(37/44 Pages) SITIME

37 / 44 page

Rev 0.90

Page 37 of 44

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SiT3521 1 to 340 MHz Elite™ I2C/SPI Programmable Oscillator

PRELIMINARY

The SiT3521 can support all four operating modes. By

default, modes 0 and 3 are supported, but modes 1 and 2

can be supported in the future.

The serial byte interface format is shown below: 8-bit

command (read or write), 8-bit SPI address and 16-bit data.

The serial order is most significant bit (MSB) first. The SPI

protocol also supports auto address incrementing which

means the address will automatically increment after the

first transaction. Auto address incrementing will result in

higher data throughput when writing to registers with

contiguous addresses. If it is required to write to non-

contiguous addresses, a write command and register

address must be used for each transaction after the

delay (125 us min). Without such delay, the device will

consider command and address bytes as a data for the

consequent register.

The detail register descriptions are covered in the I2C/SPI

Control Registers.

A description of DCO control is in DCO Functional

Description and a description of changing the output center

frequency is in any-frequency Functional Description.

The below Figure 36 shows the timing diagram for modes

0 and 3.

Address[7:0]

Command[7:0]

Data[15:0]

WRITE: 57h

READ: A5h

00: DCXO Frequency Control

01: DCXO Frequency Control, OE

02: DCXO Pull Range Control

03: PFM Control

04: PFM Control

05: PLL Post Divider Control

Differential Drive Strength

06: Differential Driver Control

Figure 35. SPI control word format

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