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TUSB1002AI bảng dữ liệu(PDF) 9 Page - Texas Instruments

tên linh kiện TUSB1002AI
Giải thích chi tiết về linh kiện  USB3.2 10 Gbps Dual-Channel Linear Redriver
PDF  31 Pages
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nhà sản xuất  TI1 [Texas Instruments]
Trang chủ  http://www.ti.com
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TUSB1002AI bảng dữ liệu(HTML) 9 Page - Texas Instruments

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9
TUSB1002A
www.ti.com
SLLSF63 – MARCH 2018
Product Folder Links: TUSB1002A
Submit Documentation Feedback
Copyright © 2018, Texas Instruments Incorporated
(1)
Following pins comprise CFG pins: MODE, CFG[2:1], CH1_EQ[2:1], CH2_EQ[2:1]
(2)
Internal reset is the logical AND of EN pin and internal power good.
6.6 Timing Requirements
over operating free-air temperature and voltage range (unless otherwise noted)
MIN
NOM
MAX
UNIT
td_pg
Internal power good asserted high when VCC is at 2.5V
5
µs
tCFG_SU
CFG(1) pins setup before internal Reset(2) high
0
µs
tCFG_HD
CFG(1) pins hold after internal Reset(2) high
500
µs
tVCC_RAMP
VCC supply ramp requirement
0.1
50
ms
6.7 Switching Characteristics
over operating free-air temperature and voltage range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
tIDLEEntry
Delay from U0 to electrical idle
VCC = 3.0 V; EN = 1;See Figure 1
150
ps
tIDLEEntry_U1
U1 exit time. Break in electrical idle
to transmission of LFPS.
VCC = 3.0 V; EN = 1; See Figure 1
150
ps
tIDLEEntry_U2
U3
U2/U3 exit time; Break in electrical
idle to transmission of LFPS
VCC = 3.0 V; EN = 1; See Figure 1
6
µs
tDIFF_DLY
Differential propagation delay
VCC = 3.0 V; EN = 1;
150
ps
tPWRUP_ACTI
VE
Time from assertion of EN to device
active and performing Rx.Detect on
both ports
VCC = 3.0 V; EN = 1;
8
ms
tTX_RISE_FAL
L
Transmitter rise/fall time
VCC = 3.3 V; EN = 1; 10 Gbps; 20% to
80% of differential output; 1200 mVpp
linear range setting; Fast Input rise/fall
time;
27
ps
tRF_MISMATC
H
Transmitter rise/fall mismatch
VCC = 3.3 V; EN = 1; 10 Gbps; 20% to
80% of differential output; 1200 mVpp
linear range setting; 1000 mVpp VID
.6
ps
tTX_DJ
Transmitter residual deterministic
jitter
VCC = 3.3 V; EN = 1; 10 Gbps; 1200
mVpp linear range setting; Input channel
loss of 12 dB; Output channel loss of 1.5
dB; Optimized EQ;
0.05
UI
Figure 1. Idle Entry and Exit Latency



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