TDA9965A datasheet(8/22 Pages) PHILIPS

8 / 22 page

2004 Jul 05

Philips Semiconductors

Product speciﬁcation

12-bit, 5.0 V, 40 Msps analog-to-digital

interface for CCD cameras

TDA9965A

tW(SHD)

SHD pulse width

Vi(IN) =1000mV;

transition (98.5%) in 1 pixel;

code fco(CTH) = 0000;

see Fig.5

−−

code fco(CTH)

0000

−

0001

−

0010

−

0100

−

1000

−

1111

−

th(IN-SHP)

CTH input hold time

compared to control pulse

SHP

see Fig.5

−

th(IN-SHD)

CTH input hold time

compared to control pulse

SHD

see Fig.5

−

Programmable Gain Ampliﬁer (PGA) output: pin PGAOUT

VPGAOUT(p-p)

PGA output ampliﬁer

dynamic voltage level

(peak-to-peak value)

−

2000

−

VPGAOUT(b)

PGA output ampliﬁer black

level voltage

code C(CLP) =0

−

1.475

−

ZPGAOUT

PGA output ampliﬁer

output impedance

fpix at 10 kHz for minimum

and maximum values

−

−Ω

IPGAOUT

PGA output current drive

static

−−

1mA

GPGA(min)

minimum gain of PGA

circuit

code GPGA =0

−

GPGA(max)

maximum gain of PGA

circuit

code GPGA ≥767

−

Analog-to-Digital Converter (ADC)

fpix(max)

maximum pixel frequency

−−

MHz

tW(CLKADC)H

CLKADC pulse width

HIGH

Vi(IN) = 1000 mV;

transition (99.5%) in 1 pixel;

code fco(CTH) = 0000;

code GPGA = 128; see Fig.5

−−

tW(CLKADC)L

CLKADC pulse width

LOW

Vi(IN) = 1000 mV;

transition (99.5%) in 1 pixel;

code fco(CTH) = 0000;

code GPGA = 128

−−

SRCLKADC

CLKADC input slew rate

rising and falling edges;

10% to 90%

0.5

−−

V/ns

Vi(ADCIN)(p-p)

ADC input voltage

(peak-to-peak value)

with internal regulator

−

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

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