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5238-DS03-405-R bảng dữ liệu(PDF) 63 Page - Broadcom Corporation. |
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5238-DS03-405-R bảng dữ liệu(HTML) 63 Page - Broadcom Corporation. |
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63 / 76 page ![]() Advance Data Sheet BCM5238 1/31/03 Broa d c om Co rp o r a t i o n Document 5238-DS03-405-R Auxiliary Status 4 Register (Shadow Register) Page 55 AUXILIARY MODE 3 REGISTER (SHADOW REGISTER) FIFO Size Select [3:0]. The BCM5238 indicates the current selection of receive FIFO size using bit 3 through 0 as shown in Table 51. The size can also be determined by bit Extended FIFO Enable (register 10h, bit 2) and bit Jumbo Packet Enable (register 1Bh, bit 9) for backward compatibility with the 0.35 µm products. AUXILIARY STATUS 4 REGISTER (SHADOW REGISTER) Packet Length Counter [15:0]. The BCM5238 shows the number of bytes in the last packet received. This is valid only when a valid link is established. Table 50: Auxiliary Mode 3 Register (Shadow Register 29d, 1Dh) BIt Name R/W Description Default 15:4 Reserveda a. When writing to this register, preserve existing values of reserved bits by completing a Read/Modify Write. – – 000h 3:0 FIFO Size Select[3:0] R/W Currently selected receive FIFO size 0100 Note: R/W = Read/Write, RO = Read only, SC = Self Clear, LL = Latched Low, LH = Latched High, LL and LH Clear after read operation. Use default values of reserved bit(s) when writing to reserved bit(s). MII shadow register bank 1 is accessed by setting MII register 1Fh bit 7 to a 1. Table 51: Current Receive FIFO Size FIFO Size Select[3:0] Receive FIFO size in use (Number of Bits) 0000 12 0001 16 0010 20 0011 24 0100 28 0101 32 0110 36 0111 40 1000 44 1001 48 1010 52 1011 56 1100 60 1101 64 Table 52: Auxiliary Status 4 Register (Shadow Register 30d, 1Eh) BIt Name R/W Description Default 15:0 Packet Length Counter[15:0] R/O Number of bytes in the last received packet 0000h |
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