5228-DS09-405-R datasheet(82/100 Pages) BOARDCOM

82 / 100 page

BCM5228

Data Sheet

7/12/04

Broa d c om Co rp o r a t i o n

Page 70

Timing and AC Characteristics

Document

5228-DS09-405-R

Se ction 7: Timing an d AC Char acte r istics

All digital output timing is specified at CL = 30 pF.

Output rise/fall times are measured between 10% and 90% of the output signal swing. Input rise/fall times are measured

between VIL maximum and VIH minimum. Output signal transitions are referenced to the midpoint of the output signal swing.

Input signal transitions are referenced to the midpoint between VIL maximum and VIH minimum.

Figure 5: Clock and Reset Timing

Table 49: Clock Timing

Parameter

Symbol

Min

Typ

Max

Unit

REF_CLK cycle time (50-MHz operation)

CK_CYCLE

–

REF_CLK cycle time (125-MHz operation)

CK_CYCLE

–

REF_CLK high/low time (50-MHz operation)

CK_HI

CK_LO

710

REF_CLK high/low time (125-MHz operation)

CK_HI

CK_LO

–4

–

REF_CLK rise/fall time (50-MHz operation)

CK_EDGE

–

REF_CLK rise/fall time (125-MHz operation)

CK_EDGE

–

Table 50: Reset Timing

Parameter

Symbol

Min

Typ

Max

Unit

Reset pulse length with stable REF_CLK input

RESET_LEN

–

µs

Activity after end of reset

RESET_WAIT

100

–

µs

RESET rise/fall time

RESET_EDGE

–

REF_CLK

RESET#

Normal PHY

begin here

RESET_LEN

RESET_WAIT

CK_HI

CK_CYCLE

CK_EDGE

CK_LO

CK_EDGE

activity can

RESET_EDGE

5228-DS09-405-R bảng dữ liệu(PDF) 82 Page - Broadcom Corporation.

5228-DS09-405-R bảng dữ liệu(HTML) 82 Page - Broadcom Corporation.

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100

bảng dữ liệu tải về

Link URL