MB90598GPF datasheet(39/52 Pages) CYPRESS

39 / 52 page

Document Number: 002-07700 Rev. *B

Page 39 of 52

MB90595G Series

11.4.3 Power On Reset

(VCC

 5.0 V10%, VSS  AVSS  0.0 V, TA  40 C to 85 C)

*: VCC must be kept lower than 0.2 V before power-on.

Notes:

■ The above values are used for creating a power-on reset.

■ Some registers in the device are initialized only upon a power-on reset. To initialize these registers, turn on

the power supply using the above values.

11.4.4 UART0/1, Serial I/O Timing

(VCC

 5.0 V10%, VSS  AVSS  0.0 V, TA  40 C to 85 C)

Parameter

Symbol

Pin name

Condition

Value

Unit

Remarks

Min

Max

Power on rise time

VCC

—

0.05

Power off time

tOFF

VCC

—

Due to repetitive operation

Parameter

Symbol

Pin name

Condition

Value

Unit

Remarks

Min

Max

Serial clock cycle time

tSCYC

SCK0 to SCK2

Internal clock operation

output pins are CL = 80

pF + 1 TTL.

8 tCP

—ns

SCK

  SOT delay time

tSLOV

SCK0 to SCK2,

SOT0 to SOT2

–80

Valid SIN

 SCK 

tIVSH

SCK0 to SCK2,

SIN0 to SIN2

100

—

SCK

  Valid SIN hold time

tSHIX

SCK0 to SCK2,

SIN0 to SIN2

—

2.7 V

0.2 V

VCC

0.2 V

tOFF

Sudden changes in the power supply voltage may cause a power-on reset.

To change the power supply voltage while the device is in operation, it is recommended to

raise the voltage smoothly to suppress fluctuations as shown below.

In this case, change the supply voltage with the PLL clock not used. If the voltage drop is 1

V or less per second, however, you can use the PLL clock.

VCC

VSS

3 V

RAM data being held

It is recommended to keep the

rising speed of the supply voltage

at 50 mV/ms or slower.

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