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ADC14155NBA/EM bảng dữ liệu(PDF) 14 Page - Texas Instruments |
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ADC14155NBA/EM bảng dữ liệu(HTML) 14 Page - Texas Instruments |
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14 / 34 page ![]() V A AGND To Internal Circuitry I/O 14 ADC14155QML-SP SNAS378J – NOVEMBER 2008 – REVISED MARCH 2018 www.ti.com Product Folder Links: ADC14155QML-SP Submit Documentation Feedback Copyright © 2008–2018, Texas Instruments Incorporated (1) The inputs are protected as shown below. Input voltage magnitudes above VA or below GND will not damage this device, provided current is limited per Note 5. However, errors in the A/D conversion can occur if the input goes above 2.6 V or below GND as described in the Recommended Operating Conditions section. (2) To ensure accuracy, it is required that |VA – VD| ≤ 100 mV and separate bypass capacitors are used at each power supply pin. (3) With the test condition for VREF = 1 V (2-VP-P differential input), the 14-bit LSB is 122.1 µV. 6.11 Typical Performance Characteristics, DNL, INL Unless otherwise specified, the following specifications apply: AGND = DGND = DRGND = 0 V, VA = VD = 3.3 V, VDR = 1.8 V, Internal VREF = 1 V, fCLK = 155 MHz, VCM = VRM, CL = 5 pF/pin, Differential Analog Input, Single-Ended Clock Mode, Offset Binary Format. Typical values are for TA = 25°C. (1) (2) (3) Figure 3. DNL Figure 4. INL |
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