PIC16F767 datasheet(76/276 Pages) MICROCHIP

76 / 276 page

PIC16F7X7

DS30498C-page 74

 2004 Microchip Technology Inc.

6.3

Using Timer0 With an

External Clock

When no prescaler is used, the external clock input is

the same as the prescaler output. The synchronization

of T0CKI with the internal phase clocks is accom-

plished by sampling the prescaler output on the Q2 and

Q4 cycles of the internal phase clocks. Therefore, it is

necessary for T0CKI to be high for at least 2 TOSC (and

a small RC delay of 20 ns) and low for at least 2 TOSC

(and a small RC delay of 20 ns). Refer to the electrical

specification of the desired device.

6.4

Prescaler

There is only one prescaler available, which is mutually

exclusively shared between the Timer0 module and the

Watchdog Timer. A prescaler assignment for the

Timer0 module means that the prescaler cannot be

used by the Watchdog Timer and vice versa. This

prescaler is not readable or writable (see Figure 6-1).

The PSA and PS2:PS0 bits (OPTION_REG<3:0>)

determine the prescaler assignment and prescale ratio.

When assigned to the Timer0 module, all instructions

writing to the TMR0 register (e.g., CLRF 1, MOVWF 1,

BSF 1,x

....etc.) will clear the prescaler. When assigned

to WDT, a CLRWDT instruction will clear the prescaler

along with the Watchdog Timer. The prescaler is not

readable or writable.

Note:

Although the prescaler can be assigned to

either the WDT or Timer0, but not both, a

new divide counter is implemented in the

WDT circuit to give multiple WDT time-out

selections. This allows TMR0 and WDT to

each have their own scaler. Refer to

Section 15.17 “Watchdog Timer (WDT)”

for further details.

Note:

Writing to TMR0 when the prescaler is

assigned to Timer0 will clear the prescaler

count but will not change the prescaler

assignment.

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