HT85F2250 datasheet(92/187 Pages) HOLTEK

92 / 187 page

Rev. 1.10

9� of 187

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A/D Flash 8051 Core Low Pin Count MCU

HT85F2250/HT85F2262

TCON Register

SFR Address: 88h

Bit

Name

TF1

TR1

TF0

TR0

IE1

IT1

IE0

IT0

R/W

POR

Bit 7

TF1: Timer 1 interrupt request flag

0: No request

1: Interrupt request

This bit will be cleared by hardware automatically when the interrupt is processed.

Bit 6

TR1: Timer 1 Run control

Described elsewhere

Bit 5

TF0: Timer 0 interrupt request flag

0: No request

1: Interrupt request

This bit will be cleared by hardware automatically when the interrupt is processed.

Bit 4

TR0: Timer 0 Run control

Described elsewhere

Bit 3

IE1: External interrupt 1 request flag

0: No request

1: Interrupt request

This bit is set by hardware when the external interrupt INT1 (edge, depending on

settings) is observed. This bit will be cleared by hardware when the interrupt is

processed.

When the external interrupt INT1 (level, depending on settings) is observed, IE1 is the

inverse level of the INT1.

Bit 2

IT1: External interrupt 1 type control

0: Low Level

1: Falling Edge

Bit 1

IE0: External interrupt 0 request flag

0: No request

1: Interrupt request

This bit is set by hardware when the external interrupt INT0 (edge, depending on

settings) is observed. This bit will be cleared by hardware when the interrupt is

processed.

When the external interrupt INT0 (level, depending on settings) is observed, IE0 is the

inverse level of the INT0.

Bit 0

IT0: External interrupt 0 type control

0: Low Level

1: Falling Edge

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