IRMCS2031

Command Acknowledgement Byte

Checksum

Register Read Acknowledgement (error)

The following example shows a command sequence sent from the host to the IRMCK203 requesting four bytes of read

register data:

0xA0

Read operation beginning at offset 0x20 (high-order bit selects read operation)

0x04

Requested data byte count is 4

0xA4

Checksum

A good reply from the IRMCK203 might appear as follows:

0x20

Read completed OK at offset 0x20

0x11

Data byte 1

0x22

Data byte 2

0x33

Data byte 3

0x44

Data byte 4

0xCA

Checksum

An error reply to the command would have the following format:

0xA0

Read at offset 0x20 completed in error

0xA0

Checksum

RS-232 Timeout

The IRMCK203 receiver includes a timer that automatically terminates transfers from the host to the IRMCK203 after

a period of 32 msec.

RS-232 Transfer Examples

The following example shows a normal exchange executing a register write access.

Write Request

Data...

Host

FPGA

ACK (OK)

Perform write operation

Request complete

The example below shows a normal register read access exchange.

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