Introduction
The Lattice ORCA Series 4-based ORLI10G FPSC combines a high-speed line interface with a flexible FPGA logic core. Built on the Series 4 reconfigurable embedded System-on-a-Chip (SoC) architecture, the ORLI10G consists of an OIF standard compliant (OIF-SFI4-01.0) SFI-4.1 or IEEE® 802.3ae compliant XSBI, 10 Gbits/s or 12.5 Gbits/s transmit and 10 Gbits/s or 12.5 Gbits/s receive line interface.
   
Embedded Function Features
• Provides a line-interface to system-interface with various
    system standards such as OC-192/STM-64 SONET/SDH, quad OC-48/STM-16
    10 Gbits/s Ethernet, and 10 Gbits/s OTN (digital wrapper/strong FEC) or
    12.5 Gbits/s SuperFEC.
• Embedded PLLs with programmable M/N multiplication/division
    values provide flexible data rate conversion
    between line side and system side.
• Line-side supports 16-bit LVDS data with multiple line frequencies
    supported up to 850 MHz, depending on system standard.
• Line-side interface, including timing and jitter specifications,
    compliant to OIF 99.102.5 standard.
• Receive-side interface can be split into four separate asynchronous
    2.5 Gbits/s interfaces (4-bit LVDS data interface for each) with
    a separate clock for each for transfer to the FPGA logic.
• Data and clock rates divided by 4 or 8 for use in FPGA logic.
• LVDS I/Os compliant with EIA®-644 support hot insertion.
    All embedded LVDS I/Os include both input and output
    on-board termination to allow high-speed operation.
• Low-power LVDS buffers.