Features
 Fixed frequency jitter attenuator
with selectable clock ranges at
19, 38, 77, 155, 311, and
622 MHz (710 MHz max)
 Support for SONET, 10GbE,
10GFC, and corresponding FEC
rates
 Ultra-low jitter clock output with
jitter generation as low as
0.3 psRMS (50 kHz–80 MHz)
 Integrated loop filter with
selectable loop bandwidth
(100 Hz–7.9 kHz)
 Meets OC-192 GR-253-CORE
jitter specifications
 Dual clock inputs with integrated
clock select mux
 One clock input can be 1x, 4x, or
32x the frequency of the second
clock input
 Single clock output with
selectable signal format:
LVPECL, LVDS, CML, CMOS
 LOL, LOS alarm outputs
 Pin programmable settings
 On-chip voltage regulator for 1.8
±5%, 2.5 ±10%, or 3.3 V ±10%
operation
 Small size (6 x 6 mm 36-lead
QFN)
 Pb-free, RoHS compliant