Features
• Jitter as low as 64 fs RMS maximum (10Hz to
20MHz)
• PLL core consists of fractional-feedback Analog
PLL (APLL)
○ Operates from a 25MHz to 80MHz crystal or XO
○ APLL frequency independent of input / crystal
frequency
○ Operates as a frequency synthesizer or Digitally
Controlled Oscillator (DCO)
○ DCO has tuning granularity of < 1ppb
• Programmable status output
• 4 differential / 8 LVCMOS outputs
○ Any frequency from 10MHz to 1GHz (180MHz for
LVCMOS)
○ Programmable output buffer supports HCSL
(DC-coupled), LVDS/LVPECL/CML (AC-coupled)
or two LVCMOS
○ Differential output swing is selectable: 400mV to
800mV
○ Output Enable input with programmable effect
• Supports up to 1MHz I2C or up to 20MHz SPI serial
processor port
• Can configure itself automatically after reset via
internal customer-definable One-Time
Programmable (OTP) memory with up to four
different configurations
• 4 × 4 mm 24-QFN package