# SN65LVDS86A/SN75LVDS86A FlatLink Receiver

## Overview
This document details the SN65LVDS86A/SN75LVDS86A, a FlatLink receiver integrating three serial-in 7-bit parallel-out shift registers and four LVDS line receivers. It's designed for receiving synchronous data over four balanced-pair conductors, expanding it to 21-bit LVTTL data. It is characterized for operation between 0 to 70°C (SN75LVDS86A) and -40 to 125°C (SN65LVDS86A) for automotive applications.

## Key Features
️· Data Handling: Receives data serially, expanding to 21-bit parallel data.
️· Interface: Compatible with transmitters like SN75LVDS81, ’83, ’84, or ’85.
️· Power: Operates from a single 3.3V supply.
️· Protection: Tolerates 4kV HBM ESD.
️· Package: Available in TSSOP with 20-mil terminal pitch.
️· Low Power: Consumes less than 1mW when disabled.
️· Automotive Grade: SN65LVDS86AQ is suitable for automotive applications.

## Electrical Characteristics
️· Supply Voltage: 3V to 3.6V
️· LVDS Input: Supports differential signaling.
️· LVTTL Output: 21-bit parallel output.
️· Data Rate: Determined by input clock frequency.

## Timing Requirements
️· Setup Time: Minimum time required for data to be valid before the clock edge.
️· Hold Time: Minimum time data must remain valid after the clock edge.
️· Propagation Delay: Delay between input signal and output response.

## Package Information
️· Package Type: TSSOP
️· Pin Count: Varies (48, 56, 64 pin options)

## Application Information
️· Suitable for: Flat Panel Displays, LCD interfaces.
️· Termination: Requires line termination resistors for optimal performance.
️· Configuration: May require configuration control and print support for automotive applications.