ES4427 datasheet(4/10 Pages) ETC

4 / 10 page

SAM0358-052201

ESS Technology, Inc.

ES4428/ES4427 PRODUCT BRIEF

Name

Number

I/O

Definition

XIN

Crystal input.

XOUT

Crystal output.

DMA[11:0]

66:61, 58:53

DRAM address bus [11:0].

DCAS#

DRAM column address strobe.

DOE#

DRAM output enable.

DSCK_EN

DRAM clock enable.

DWE#

DRAM write enable.

DRAS0#

DRAM row address strobe 0.

DRAS1#

DRAM row address strobe 1 (active-low).

DBANKSEL1

DRAM address bus select 1 output. Only active in 64Mb SDRAM mode.

DRAS2#

DRAM row address strobe 2 output.

DBANKSEL0

DRAM address bus select 0 output. Only active in 64Mb SDRAM mode.

DB[15:0]

96:93, 90:85, 82:77

I/O

DRAM data bus [15:0].

DCS[1:0]#

97, 100

SDRAM chip select [1:0].

DQM

101

Data input/output mask.

DSCK

102

Output clock to SDRAM.

DCLK

105

27 MHz clock input to PLL.

YUV[7:0]

115:113, 110:106

8-bit YUV output.

PCLK2XSCN

116

I/O

2X pixel clock.

PCLKQSCN

117

I/O

Pixel clock.

VSYNC#

118

I/O

Vertical sync.

HSYNC#

119

I/O

Horizontal sync.

HD[15:0]

141:140, 137:131,

128:122

I/O

Host data bus

VPP

159

5.0V power supply.

AUX[7:0]

169:165,162:160

I/O

Auxiliary ports.

LOE#

170

EPROM device output enable.

LCS[3:0]#

176:173

EPROM chip select [3:0].

LD[15:0]

197:194, 191:185,

182:178

I/O

EPROM device data bus.

LWRLL#

198

Device write enable.

LWRHL#

199

Device write enable (active-low).

Table 1

ES4428 Pin Descriptions (Continued)

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