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Data Sheet

AD7690

APPLICATION HINTS

LAYOUT

The printed circuit board that houses the AD7690 should be

designed so that the analog and digital sections are separated

and confined to certain areas of the board. The pinout of the

AD7690, with its analog signals on the left side and its digital

signals on the right side, eases this task.

Avoid running digital lines under the device because these

couple noise onto the die unless a ground plane under the

AD7690 is used as a shield. Fast switching signals, such as CNV

or clocks, should not run near analog signal paths. Crossover of

digital and analog signals should be avoided.

At least one ground plane should be used. It can be common or

split between the digital and analog sections. In the latter case,

the planes should be joined underneath the AD7690s.

The AD7690 voltage reference input REF has a dynamic input

impedance and should be decoupled with minimal parasitic

inductances. This is done by placing the reference decoupling

ceramic capacitor close to, ideally right up against, the REF and

GND pins and connecting them with wide, low impedance traces.

Finally, the AD7690 VDD and VIO power supplies should be

decoupled with ceramic capacitors, typically 100 nF, placed

close to the AD7690 and connected using short, wide traces to

provide low impedance paths and to reduce the effect of glitches

on the power supply lines.

An example of a layout following these rules is shown in

Figure 46 and Figure 47.

EVALUATING THE AD7690 PERFORMANCE

Other recommended layouts for the AD7690 are outlined

in the documentation of the evaluation board (EVAL-

AD7690SDZ). The evaluation board package includes

a fully assembled and tested evaluation board, documentation,

and software for controlling the board from a PC via the

EVAL-SDP-CB1Z.

Figure 46. Example Layout of the AD7690 (Top Layer)

Figure 47. Example Layout of the AD7690 (Bottom Layer)

Rev. C | Page 23 of 24

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