AD7983BCPZ-R2 datasheet(16/25 Pages) AD

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Data Sheet

AD7983

Rev. B | Page 15 of 24

VOLTAGE REFERENCE INPUT

The AD7983 voltage reference input, REF, has a dynamic input

impedance and should therefore be driven by a low impedance

source with efficient decoupling between the REF and GND

pins, as explained in the Layout section.

When REF is driven by a very low impedance source, for example,

a reference buffer using the AD8031 or the AD8605, a ceramic

chip capacitor is appropriate for optimum performance.

If an unbuffered reference voltage is used, the decoupling value

depends on the reference used. For instance, a 22 µF (X5R,

1206 size) ceramic chip capacitor is appropriate for optimum

performance using a low temperature drift ADR43x reference.

If desired, a reference-decoupling capacitor value as small as

2.2 µF can be used with a minimal impact on performance,

especially DNL.

Regardless, there is no need for an additional lower value ceramic

decoupling capacitor (for example, 100 nF) between the REF

and GND pins.

POWER SUPPLY

The AD7983 uses two power supply pins: a core supply (VDD) and

a digital input/output interface supply (VIO). VIO allows direct

interface with any logic between 1.8 V and 5.0 V. To reduce the

number of supplies needed, VIO and VDD can be tied together.

The AD7983 is independent of power supply sequencing between

VIO and VDD. Additionally, it is very insensitive to power supply

variations over a wide frequency range, as shown in Figure 25.

1000

FREQUENCY (kHz)

100

Figure 25. PSRR vs. Frequency

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