AD7262BSTZ datasheet(30/33 Pages) AD

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Data Sheet

AD7262

Rev. B | Page 29 of 32

MICROPROCESSOR INTERFACING

The serial interface on the AD7262/AD7262-5 allows the parts

to connect directly to a range of different microprocessors. This

section explains how to interface the AD7262/AD7262-5 with

the Analog Devices, Inc., Blackfin® DSP, the ADSP-BF531.

AD7262/AD7262-5 TO ADSP-BF531

The ADSP-BF531 and the rest ofthe Blackfin microprocessor

family of DSPs interface directly to the AD7262/AD7262-5

without any glue logic required.The VDRIVE pin ofthe AD7262/

AD7262-5 takes the same supply voltage as that of the

ADSP-BF531. This allows the ADC to operate at a higher

supply voltage than its serial interface and, therefore, the

ADSP-BF531, if necessary. The availabilityofsecondary receive

registers on the serial ports of the Blackfin DSPs means only

one serial port is necessary to read from both DOUT pins

simultaneously. Figure 37shows both DOUTAand DOUTBof the

AD7262/AD7262-5 connected toSerial Port 0 ofthe ADSP-BF531.

The SPORT0 Receive Configuration 1 register and SPORT0

Receive Configuration 2 register must be set up as outlined in

Table 14 and Table 15.

SERIAL

DEVICE A

(PRIMARY)

SERIAL

DEVICE B

(SECONDARY)

AD7262

DOUTA

SCLK

ADSP-BF5311

1ADDITIONAL PINS OMITTED FOR CLARITY.

DR0PRI

DR0SEC

RFS0

VDRIVE

VDD

DOUTB

RCLK0

SPORT0

Figure 37. Interfacing the AD7262 to the ADSP-BF531

Table 14. The SPORT0 Receive Configuration 1 Register

(SPORT0_RCR1)

Setting

Description

RCKFE = 1

Sample data with falling edge of RSCLK

LRFS = 1

Active low frame signal

RFSR = 1

Frame every word

IRFS = 1

Internal receive frame sync (RFS) used

RLSBIT = 0

Receive MSB first

RDTYPE = 00

Zero fill

IRCLK = 1

Internal receive clock

RSPEN = 1

Receive enabled

SLEN = 11110

31-bit data-word

TFSR = RFSR = 1

Table 15. The SPORT0 Receive Configuration 2 Register

(SPORT0_RCR2)

Setting

Description

RXSE = 1

Secondary side enabled

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