MFC2000 datasheet(112/426 Pages) ETC

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MFC2000 Multifunctional Peripheral Controller 2000

Hardware Description

4-82

Conexant

100723A

4.7.4

USB Block Diagrams

Below is a block diagram depicting the four USB logical channels. Each logical channel shows the double

buffering of the address and block registers. The right side of the diagram shows the common counters for the

block and address. Also shown is the feedback path from the counters to the registers used upon USB ACKs. The

select signal for the logical channels are shown at the bottom of the diagram.

Address 1

Address 2

Block 1

Block 2

LCH1

Address 1

Address 2

Block 1

Block 2

LCH2

Address 1

Address 2

Block 1

Block 2

LCH3

Address 1

Address 2

Block 1

Block 2

LCH4

Addr Counter

Block Counter

IPB Data

Channel Select Note: Selecting Channel Will

Load current registers to counter

Address Feedback

Block Feedback

Adr_Out

Blk_Out

To IPB

Data Out

Figure 4-34. USB Logical Channels Block Diagram

4.7.4.1

USB Logical Channel Assignments

•

Ch1: Scan

Mem to PC, DMA Read only

•

Ch2: Print

PC to Mem, DMA Write only

•

Ch3: FAX Rx

Mem to PC, DMA Read only

•

Ch4: FAX Tx

PC to Mem, DMA Write only

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