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MFC2000 bảng dữ liệu(PDF) 289 Page - List of Unclassifed Manufacturers |
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MFC2000 bảng dữ liệu(HTML) 289 Page - List of Unclassifed Manufacturers |
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289 / 426 page ![]() Hardware Description MFC 2000 Multifunctional Peripheral Controller 2000 100723A Conexant 15-9 For keeping track of the transmit and receive activities, the SASIF has four separate interrupts -- the TxBufIRQ, TxShfIRQ, RxBufIRQ, and RxTimeoutIRQ. Any of these interrupt activate will turn on the IRQSASIF. Following are the conditions when they are set and cleared: TxBufIRQ TxShfIRQ RxBufIRQ 1 Activated when 1. the TxBufEmpty status bit is set, and 2. the TxBufIrqEnb control bit is set. 1. the TxShEmpty status bit is set, and 2. the TxShfIrqEnb control bit is set, and 1. the RxBufFull status bit is set, and 2. the RxBufIrqEnb control bit is set. Deactivated when 1. the TxBufEmpty status bit is cleared, or 2. the TxBufIrqEnb control bit is cleared. 1. the TxShEmpty status bit is cleared, or 2. the TxShfIrqEnb control bit is cleared. 1. the RxBufFull status bit is cleared, or 2. the RxBufIrqEnb control bit is cleared. RxTimeoutIRQ Activated when 1. the RxTimerElapsed status bit is set, and 2. the RxTimerEnb control bit is set. Deactivated when 1. the RxTimerElapsed status bit is cleared, or 2. the RxTimerEnb control bit is cleared. Note: The RxBufFull status bit and the RxBufIRQ is valid in the AsyncMode only. During the SyncMode, data receive to the SASIF is synchronous with the transmit data, therefore, the RxBufFull status bit and the RxBufIRQ signal is not used in the SyncMode. |
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