CAT93HC46 datasheet(3/9 Pages) CATALYST

3 / 9 page

CAT93HC46

Doc. No. 1008, Rev. G

1.8 V - 5.5 V

2.5 V - 5.5 V

4.5 V - 5.5 V

Test

Symbol

Parameter

Min

Max

Min

Max

Min

Max

Units

Conditions

SKMAX

Maximum Clock Frequency

MHz

tCSS

CS Setup Time

240

120

tCSH

CS Hold Time

tDIS

DI Setup Time

240

120

tDIH

DI Hold Time

240

120

tPD1

Output Delay to 1

480

240

120

tPD0

Output Delay to 0

480

240

120

tHZ(1)

Output Delay to High-Z

240

120

tCSMIN

Minimum CS Low Time

240

120

tSKHI

Minimum SK High Time

480

240

120

tSKLOW

Minimum SK Low Time

240

120

tSV

Output Delay to Status Valid

480

240

120

tEW

Program/Erase Pulse Width

A.C. TEST CONDITIONS

Input Rise and Fall Times

≤ 10 ns

Input Pulse Voltages

0.4 V to 2.4 V

4.5 V

≤ VCC ≤ 5.5 V

Timing Reference Voltages

0.8 V, 2.0 V

4.5 V

≤ VCC ≤ 5.5 V

Input Pulse Voltages

VCC x 0.2 to VCC x 0.8

1.8 V

≤ VCC ≤ 4.5 V

Timing Reference Voltages

VCC x 0.5

1.8 V

≤ VCC ≤ 4.5 V

POWER-UP TIMING (1)(2)

Symbol

Parameter

Min

Typ

Max

Units

tPUR

Power-up to Read Operation

tPUW

Power-up to Write Operation

NOTE:

(1) This parameter is tested initially and after a design or process change that affects the parameter.

(2) tPUR and tPUW are the delays required from the time VCC is stable until the specified operation can be initiated.

(3) The input levels and timing reference points are shown in the “AC Test Conditions” table.

A.C. CHARACTERISTICS

Industrial Temperature Range (-40

°C to 85°C)

CL = 100 pF

(3)

CAT93HC46 bảng dữ liệu(PDF) 3 Page - Catalyst Semiconductor

CAT93HC46 bảng dữ liệu(HTML) 3 Page - Catalyst Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9

bảng dữ liệu tải về

Link URL