ADT7470 datasheet(13/41 Pages) AD

13 / 41 page

ADT7470

Data Sheet

Rev. E | Page 12 of 40

READ OPERATIONS

The ADT7470 uses the following SMBus read protocols.

Receive Byte

This is useful when repeatedly reading a single register.

The register address must be set up previously. In this

operation, the master device receives a single byte from

a slave device, as follows:

1. The master device asserts a start condition on SDA.

2. The master sends the 7-bit slave address followed by

the read bit (high).

3. The addressed slave device asserts ACK on SDA.

4. The master receives a data byte.

5. The master asserts NO ACK on SDA.

6. The master asserts a stop condition on SDA

and the transaction ends.

In the ADT7470, the receive byte protocol is used to read a

single byte of data from a register whose address was previously

set by a send byte or write byte operation.

DATA

SLAVE

ADDRESS

Figure 12. Single-Byte Write from a Register

Alert Response Address

Alert response address (ARA) is a feature of SMBus devices,

which allows an interrupting device to identify itself to the host

when multiple devices exist on the same bus.

The SMBALERT output can be used as an interrupt output

or can be used as an SMBALERT. One or more outputs can be

connected to a common SMBALERT line connected to the

master. If a device’s SMBALERT line goes low, the following

occurs:

1. SMBALERT is pulled low.

2. The master initiates a read operation and sends the alert

response address (ARA = 000 1100). This is a general call

address that must not be used as a specific device address.

3. The device whose SMBALERT output is low responds to

the alert response address, and the master reads its device

address. The address of the device is now known, and it

can be interrogated in the usual way.

4. If more than one device’s SMBALERT output is low,

the one with the lowest device address has priority,

in accordance with normal SMBus arbitration.

5. Once the ADT7470 responds to the alert response

address, the master must read the status registers,

and the SMBALERT is cleared only if the error condition

is gone.

SMBus TIMEOUT

The ADT7470 includes an SMBus timeout feature. If there is no

SMBus activity for more than 31 ms, the ADT7470 assumes that

the bus is locked and releases the bus. This prevents the device

from locking or holding the SMBus expecting data. Some SMBus

controllers cannot handle the SMBus timeout feature, so it can

be disabled.

Table 6. Configuration Register 1—Register 0x40

Bit Address and Value

Description

Bit 3 TODIS = 0

SMBus timeout enabled (default).

Bit 3 TODIS = 1

SMBus timeout disabled.

Although the ADT7470 supports packet error checking (PEC),

its use is optional. It is triggered by supplying the extra clock

for the PEC byte. The PEC byte is calculated using CRC-8.

The frame check sequence (FCS) conforms to CRC-8 by the

following polynomial:

C(x) = x8 + x2 + x1 + 1

Consult the SMBus 1.1 Specification for more information by

searching online.

ADT7470 bảng dữ liệu(PDF) 13 Page - Analog Devices

ADT7470 bảng dữ liệu(HTML) 13 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41

bảng dữ liệu tải về

Link URL