ADT7302

Rev. B | Page 10 of 16

–40°C

–0.03125°C

–30°C

11, 1111, 1111, 1111

11, 1100, 0100, 0000

11, 1011, 0000, 0000

TEMPERATURE (°C)

75°C

150°C

01, 0010, 1100, 0000

00, 1001, 0110, 0000

00, 0000, 0000, 0001

Figure 13. Temperature to Digital Transfer Function

SCLK

DOUT

DIN

POWER-

DOWN

LEADING ZEROS

DB13

DB0

1

2

3

4

15

16

DB12

DB1

DB0

CS

Figure 14. Serial Interface Timing Diagram

SERIAL INTERFACE

The serial interface on the ADT7302 consists of four wires: CS,

SCLK, DIN, and DOUT. The interface can be operated in

3-wire mode with DIN tied to ground, in which case the inter-

face has read-only capability, with data being read from the data

register via the DOUT line. It is advisable to always use CS to

create a communications window, as shown in Figure 13,

because this improves synchronization between the ADT7302

and the master device. The DIN line is used to write the part

into standby mode, if required. The CS line is used to select the

device when more than one device is connected to the serial

clock and data lines.

The part operates in slave mode and requires an externally

applied serial clock to the SCLK input to access data from the

data register. The serial interface on the ADT7302 allows the

part to be interfaced to systems that provide a serial clock

synchronized to the serial data, such as the 80C51, 87C51,

68HC11, 68HC05, and PIC16Cxx microcontrollers as well as

DSP processors.

A read operation from the ADT7302 accesses data from the

temperature value register while a write operation to the part

writes data to the control register.

Read Operation

Figure 14 shows the timing diagram for a serial read from the

ADT7302. The CS line enables the SCLK input. Thirteen bits of

data plus a sign bit are transferred during a read operation.

Read operations occur during streams of 16 clock pulses. The

first two bits out are leading zeros and the next 14 bits contain

the temperature data. If CS remains low and 16 more SCLK

cycles are applied, the ADT7302 loops around and outputs the

two leading zeros plus the 14 bits of data that are in the temper-

ature value register. When CS returns high, the DOUT line goes

into three-state. Data is clocked out onto the DOUT line on the

falling edge of SCLK.