VS6552V02CSLASHT2 datasheet(12/26 Pages) STMICROELECTRONICS

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Table 13. vLVDS Interface AC Electrical Characteristics

Table 14. vLVDS TIming Characteristics

Figure 5. VisionLink AC timing

Symbol

Parameter description

Min.

Typ.

Max.

Unit

Vod

Differential voltage swinga,b

a.Supplies of VDIG = 1.8 V and VANA = 2.8 V, Temperature = 25 °C

b.Measured over a 100 Ohm load

100

150

200

Vcm

Common mode voltage (self biasing)

0.8

0.9

1.0

Output Impedance

140

IDR

Drive current range (internally set by bias

circuit)

0.5

1.5

Symbol

Parameter

Min.

Typ.

Max.

Unit

fPCLKP/

PCLKN

PCLKP/PCLKN clock frequency

120

MHz

tPCLKP/

PCLKN

PCLKP/PCLKN clock period

8.3

100

PCLKP/PCLKN duty cycle

tLOW

Low period of PCLKP/PCLKN

1.66

tHIGH

High period of PCLKP/PCLKN

1.66

tRISE

Rise time of PDATAP/PDATAN, PCLKP/

PCLKN

0.3

0.5

tFALL

Fall time of PDATAP/PDATAN, PCLKP/

PCLKN

0.3

0.5

tHD;DAT

Data hold time

tSU;DAT

Data set-up time

PDATAP/

PDATAN

PCLKP/

PCLKN

VDIG/2

VDIG / 2

tHD;DAT

tSU;DAT

tFALL

tHIGH

tRISE

tLOW

tPCLKP/PCLKN

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