TMS320LF2402APGS datasheet(19/133 Pages) TI

19 / 133 page

TMS320LF2407A,TMS320LF2406A,TMS320LF2403A,TMS320LF2402A

TMS320LC2406A,TMS320LC2404A,TMS320LC2403A,TMS320LC2402A

DSP CONTROLLERS

SPRS145J − JULY 2000 − REVISED NOVEMBER 2004

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251−1443

pin functions (continued)

Table 2. LF240xA and LC240xA Pin List and Package Options†‡ (Continued)

PIN NAME

LF2407A

(144-PGE)

2406A

(100-PZ)

LC2404A

(100-PZ)

2403A,

LC2402A

(64-PAG)

and

2402A

(64-PG)

DESCRIPTION

ADDRESS, DATA, AND MEMORY CONTROL SIGNALS (CONTINUED)

A12

Bit 12 of the 16-bit address bus

A13

Bit 13 of the 16-bit address bus

A14

Bit 14 of the 16-bit address bus

A15

Bit 15 of the 16-bit address bus

127

Bit 0 of 16-bit data bus

(

↑)

130

Bit 1 of 16-bit data bus

(

↑)

132

Bit 2 of 16-bit data bus

(

↑)

134

Bit 3 of 16-bit data bus

(

↑)

136

Bit 4 of 16-bit data bus

(

↑)

138

Bit 5 of 16-bit data bus

(

↑)

143

Bit 6 of 16-bit data bus

(

↑)

Bit 7 of 16-bit data bus

(

↑)

Bit 8 of 16-bit data bus

(

↑)

Bit 9 of 16-bit data bus

(

↑)

D10

Bit 10 of 16-bit data bus

(

↑)

D11

Bit 11 of 16-bit data bus

(

↑)

D12

Bit 12 of 16-bit data bus

(

↑)

D13

Bit 13 of 16-bit data bus

(

↑)

D14

Bit 14 of 16-bit data bus

(

↑)

D15

Bit 15 of 16-bit data bus

(

↑)

POWER SUPPLY

VDD#

Core supply +3.3 V. Digital logic supply voltage.

VDD#

Core supply +3.3 V. Digital logic supply voltage.

129

VDDO#

I/O buffer supply +3.3 V. Digital logic and buffer supply

VDDO#

I/O buffer supply +3.3 V. Digital logic and buffer supply

voltage.

141

† Bold, italicized pin names indicate pin function after reset.

‡ GPIO − General-purpose input/output pin. All GPIOs come up as input after reset.

§ It is highly recommended that VCCA be isolated from the digital supply voltage (and VSSA from digital ground) to maintain the specified accuracy

and improve the noise immunity of the ADC.

¶ Only when all of the following conditions are met: EMU1/OFF is low, TRST is low, and EMU0 is high

# No power supply pin (VDD, VDDO, VSS, or VSSO) should be left unconnected. All power supply pins must be connected appropriately for proper

device operation.

LEGEND:

↑ − Internal pullup

↓ − Internal pulldown

(Typical active pullup/pulldown value is

±16 µA.)

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