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ST92F120 bảng dữ liệu(PDF) 316 Page - STMicroelectronics |
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ST92F120 bảng dữ liệu(HTML) 316 Page - STMicroelectronics |
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316 / 324 page ![]() 316/324 ST92F120 - SUMMARY OF CHANGES Page 8 9 - Changed the picture as follows: . Added in RCCU output signals the new: CLOCK2/8 . Removed from A/D conv. block the labels "zad" . Duplicated A/D block like at page 6 (same input signals) . Added RWN in the CPU signals (bold/no italic) leaving the italic one replaced INT3:0 by INT 6:0 - For consistency with block diagram: ASN instead of AS+overbar DSN instead of DS+overbar RWN instead of R/W+overbar on W RESETN instead of RESET+overbar HW0SW1 instead of HW0_SW1 ST92E120 twice replaced with ST92E120/F120 Inside ASN item (at the end) removed the last sentence "Under program.." Inside DSN item (at the end) removed the last sentence "It can be..." Inside RWN item (at the end) removed the last sentence "It can be..." Added: "On QFP100 version, RWN is also available as true pin." VDD item: Added "Two internally connected pins are available" VSS item: Added description "Two internally connected pins are available" Added a new item for VPP: VPP. High voltage Power Supply for Eprom memory (only on ST92E120; on ST92F120 the pin is not connected). P2.0...P9.7 item: highlighted that on QFP80, only P8.0-P8.1 is available and P9 is not available at all Rev. Page Section Main changes Date 1 |
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