Philips Semiconductors

P89LPC924/925

8-bit microcontrollers with accelerated two-clock 80C51 core

Product data

Rev. 03 — 15 December 2004

43 of 49

9397 750 14471

© Koninklijke Philips Electronics N.V. 2004. All rights reserved.

[1]

Parameters are valid over operating temperature range unless otherwise specified. Parts are tested to 2 MHz, but are guaranteed to

operate down to 0 Hz.

[2]

When using an oscillator frequency above 12 MHz, the reset input function of P1.5 must be enabled. An external circuit is required to

minimum specified operating voltage. When using an oscillator frequency above 12 MHz, in some applications, an external brownout

Table 10:

AC characteristics

Symbol

Parameter

Conditions

Variable clock

Unit

Min

Max

Min

Max

internal RC oscillator frequency

(nominal f = 7.3728 MHz)

trimmed to

±1%

7.189

7.557

7.189

7.557

MHz

internal Watchdog oscillator

frequency (nominal f = 400 kHz)

320

520

320

520

kHz

oscillator frequency

[2]

0

18

-

-

MHz

clock cycle

see Figure 13

55

-

-

-

ns

CLKLP active frequency

0

8

-

-

MHz

Glitch filter

glitch rejection, P1.5/RST pin

-

50

-

50

ns

signal acceptance, P1.5/RST pin

125

-

125

-

ns

glitch rejection, any pin except

P1.5/RST

-

15

-

15

ns

signal acceptance, any pin except

P1.5/RST

50

-

50

-

ns

External clock

HIGH time

see Figure 13

22

22

-

ns

LOW time

see Figure 13

22

22

-

ns

rise time

see Figure 13

-5

-

5

ns

fall time

see Figure 13

-5

-

5

ns

Shift register (UART mode 0)

serial port clock cycle time

-

888

-

ns

output data set-up to clock rising

edge

-

722

-

ns

output data hold after clock rising

edge

-

75

ns

input data hold after clock rising

edge

-0

-

0

ns

input data valid to clock rising edge

150

-

150

-

ns