LT4351CMS datasheet(16/20 Pages) LINER

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LT4351

sn4351 4351fs

Figure 15. 5V/5A Design Example

Layout Considerations

There are two considerations for board layout. The first is

that VIN and VDD bypass capacitors should be as close to

the part as possible. The GND pin should represent the

common tie point. The resistive dividers for UV and OV

should tie here as well.

APPLICATIO S I FOR ATIO

Take care that current flow to the load (both through VIN

and GND), does not inadvertently produce errors due to IR

drops in PCB traces.

Keep the traces to the MOSFETs wide and short and close

to the part. The PCB traces associated with the power path

through the MOSFETs should have low resistance.

GATE

OUT

VIN

µF

MBR0530

1.69k

25.5k

VIN

4.7

µH

LT4351

VDD

STATUS

FAULT

GND

Si4838DY

110

1.47k

24.9k

Ω

0.1

µF

220

µF

4351 F15

OUT

µF

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