AD9262EBZ datasheet(32/33 Pages) AD

32 / 33 page

AD9262

Rev. A | Page 31 of 32

Address

Bit(s)

Mnemonic

Default

Description

Output Modes

0x14

DRVSTD

0: 3.3 V

1: 1.8 V

Interleave

1: interleave both channels onto D[15:0]A

OUTENB

1: data outputs tristated

OUTINV

1: data outputs bitwise inverted

[1:0]

Format

0: offset binary

1: twos complement

2: Gray code

3: offset binary

Output Adjust

0x15

[3:2]

DRVSTR33

Typical output sink current to DGND

0: 33 mA

1: 63 mA

2: 93 mA

3: 120 mA

[1:0]

DRVSTR18

Typical output sink current to DGND



0: 10 mA

1: 20 mA

2: 30 mA

3: 39 mA

Output Clock

0x16

DCOINV

1: invert DCO

Reference

0x18

EXTREF

1: use external reference

Output Data

0x101

QEC

1: enable quadrature error correction

[5:0]

KOUT

Output data rate, see Table 18

Overrange

0x111

AUTORST

1: enable loop filter reset indicator on ORx pin

OR_IND

Refer to Table 21

[5:0]

ORTHRESH

Refer to Table 20

QEC1

0x112

DCFRZ

1: freeze dc correction coefficients

PHASEFRZ

1: freeze phase correction coefficients

GAINFRZ

1: freeze gain correction coefficients

DCENB

1: disable dc correction

PHASEENB

1: disable phase correction

GAINENB

1: disable gain correction

QEC2

0x113

DCFRC

1: force dc correction coefficients to initial static values

PHASEFRC

1: force phase correction coefficients to initial static values

GAINFRC

1: force gain correction coefficients to initial static values

AD9262EBZ bảng dữ liệu(PDF) 32 Page - Analog Devices

AD9262EBZ bảng dữ liệu(HTML) 32 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33

bảng dữ liệu tải về

Link URL