CD74FCT654M datasheet(7/9 Pages) TI

7 / 9 page

8-7

Switching

tr, tf = 2.5ns, CL = 50pF, RL (Figures 3, 4)

PARAMETER

SYMBOL

VCC (V)

25oC0oC TO 70oC

UNITS

TYP

MIN

MAX

Power Dissipation Capacitance

CPD

----

Min (Valley) VOH (B Side) During Switching of Other

Outputs (Output Under Test Not Switching)

VOHV

(Figure 1)

0.5

Max (Peak) VOL During Switching of Other Outputs

(Output Under Test Not Switching)

VOLP

(Figure 1)

Input Capacitance

---

Three-State Output Capacitance (B Side)

---

Off-State Output Capacitance (A Side)

---

NOTES:

8. 5V: minimum is at 4.75V for 0oC to 70oC, typical is at 5V.

9. CPD, measured per flip-flop, is used to determine the dynamic power consumption. PD

(per package) = VCC ICC + Σ(VCC

2 f

I CPD + VO

2 f

OCL + VCC ∆ICC D) where:

VCC = supply voltage

∆ICC = flow through current x unit load

CL = output load capacitance

D = duty cycle of input high

fO = output frequency

fI = input frequency

Test Circuits and Waveforms

NOTE:

10. Pulse Generator for All Pulses: Rate

≤ 1.0MHz; ZOUT ≤ 50Ω;

tf, tr ≤ 2.5ns.

FIGURE 1. TEST CIRCUIT

FIGURE 2. SETUP, HOLD, AND RELEASE TIMING

FIGURE 3. PULSE WIDTH

DUT

PULSE ZO

GEN

500

Ω

50pF

500

Ω

VCC

RT = ZO

tr, tf = 2.5ns

(NOTE 10)

SWITCH POSITION

TEST

SWITCH

tPLZ, tPZL, Open Drain

Closed

tPHZ, tPZH, tPLH, tPHL

Open

DEFINITIONS:

CL = Load capacitance, includes jig and probe

capacitance.

RT = Termination resistance, should be equal to ZOUT of

the Pulse Generator.

VIN = 0V to 3V.

Input: tr =tf = 2.5ns (10% to 90%), unless otherwise specified

ASYNCHRONOUS CONTROL

tSH

1.5V

tSH

PRESET CLEAR

CLOCK ENABLE

ETC.

SYNCHRONOUS CONTROL

tREM

DATA

INPUT

TIMING

INPUT

LOW-HIGH-LOW

PULSE

HIGH-LOW-HIGH

PULSE

1.5V

CD74FCT653, CD74FCT654

CD74FCT654M bảng dữ liệu(PDF) 7 Page - Texas Instruments

CD74FCT654M bảng dữ liệu(HTML) 7 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9

bảng dữ liệu tải về

Link URL