| công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
|
XRT4500 bảng dữ liệu(PDF) 21 Page - Exar Corporation |
|
|
|||||||||||||||||||||||||||||
XRT4500 bảng dữ liệu(HTML) 21 Page - Exar Corporation |
|
21 / 99 page ![]() XRT4500 áç áç áç áç MULTIPROTOCOL SERIAL NETWORK INTERFACE IC REV. 1.0.7 18 PIN DESCRIPTIONS (CONT.) PIN # Signal DTE MODE DCE MODE TYPE FUNCTION 53 OSCEN I Test Oscillator Enable – Active Low; This active-low input pin permits the user to enable or disable the “Internal Oscillator” within the XRT4500. If the user enables this fea- ture then the XRT4500 will begin generating a clock signal via both the RX2D and RX3D output pins. The frequency of this clock signal ranges between 32kHz and 64kHz. This clock signal can be used to support “Stand-Alone DTE Diag- nostic” Testing. Setting this input to “0” enables the “Internal Oscillator”. Setting this input to “1” disables the “Internal Oscillator”. Note: The “Internal Oscillator” is only available if the XRT4500 is operating in the DTE Mode. If LP = “0” The Clock Signal (32 - 64kHz) is available on Rx3D. If LP = “0” and EC = “0” the clock signal is available on RX2D. NOTE: This input pin contains an internal 20k Ω pull-up to V DD. 54 CLKINV I Invert Clock Input Pin – This ‘Active -Low’ input pin permits the user to either enable or disable the ‘Clock/Inversion’ feature. The exact manifestation of the ‘Clock Inversion’ feature depends upon whether the XRT4500 is operating in the ‘DCE’ or ‘DTE’ Mode. If the XRT4500 is operating in the DTE Mode, then the RX3D output signal (which is receiving the TXC signal) will be inverted before it is outputted to the terminal equipment. If the XRT4500 is operating in the DCE Mode, then the TX3D input signal (which is transmitting the TXC signal) will be inverted before it converted into the analog format and is output to the line. Setting this input pin ‘Low’ enables the ‘Clock Inversion’ feature. Conversely, setting this input pin ‘High’ disables this feature. NOTE: This input pin contains an internal 20k Ω pull-up to V DD. 55 DTINV I Invert Data – Active Low; Logic 0: Data Inverted. Logic 1: Data not Inverted. Internal 20K Ω pull-up V DD. 56 VSS_T123 -6V Power Supply Signal: This supply voltage is internally gener- ated by the Switching Regulator Circuit within the XRT4500. 57 GND Digital Ground: for transmitters 1, 2, and 3 58 VDD_T123 Analog VDD: for transmitters 1, 2, and 3 59 GND_T12 Analog Ground: Transmitters 1 and 2 |
|
Link URL |
| Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không? [ DONATE ] |
Alldatasheet là | Quảng cáo | Liên lạc với chúng tôi | Chính sách bảo mật | Liên kết đến bảng dữ liệu | Trao đổi link | Tìm kiếm theo nhà sản xuất All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |