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TLC372CD bảng dữ liệu(PDF) 7 Page - Texas Instruments

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Giải thích chi tiết về linh kiện  LIN CMOS DUAL DIFFERENTIAL COMPARATORS
PDF  20 Pages
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TLC372CD bảng dữ liệu(HTML) 7 Page - Texas Instruments

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TLC372
LinCMOS DUAL DIFFERENTIAL COMPARATORS
SLCS114D − NOVEMBER 1983 − REVISED APRIL 2004
7
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
Response time is defined as the interval between the application of an input step function and the instant when the
output reaches 50% of its maximum value. Response time, low-to-high level output, is measured from the leading
edge of the input pulse, while response time, high-to-low level output, is measured from the trailing edge of the input
pulse. Response-time measurement at low input signal levels can be greatly affected by the input offset voltage. The
offset voltage should be balanced by the adjustment at the inverting input as shown in Figure 3, so that the circuit
is just at the transition point. Then a low signal, for example 105-mV or 5-mV overdrive, causes the output to change
state.
Low-to-High-
Level Output
DUT
5.1 k
Ω
1
µF
0.1
µF
1 k
Ω
50
Ω
CL
(see Note A)
VDD
Pulse
Generator
Input Offset Voltage
Compensation Adjustment
10
Ω
10 Turn
1 V
−1 V
Overdrive
Input
100 mV
Overdrive
Input
tf
tPHL
10%
50%
90%
90%
50%
tr
tPLH
High-to-Low-
Level Output
TEST CIRCUIT
VOLTAGE WAVEFORMS
10%
100 mV
NOTE A: CL includes probe and jig capacitance.
Figure 3. Response, Rise, and Fall Times Circuit and Voltage Waveforms



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