AD7616-PBSTZ datasheet(39/47 Pages) AD

39 / 47 page

AD7616-P

Data Sheet

Rev. 0 | Page 38 of 46

CHANNEL REGISTER

Address: 0x03, Reset: 0x0000, Name: Channel Register

In software manual mode, the channel register selects the input channel or self test channel for the next conversion.

Table 20. Bit Descriptions for the Channel Register

Bits

Bit Name

Settings

Description

Reset

Access

[15:9]

Addressing

Bits[15:9] define the address of the relevant register. See the Addressing Registers section

for further details.

0x0

R/W

RESERVED

Reserved.

0x0

R/W

[7:4]

CHB

Channel selection bits for ADC B channels.

0000

V0B.

0001

V1B.

0010

V2B.

0011

V3B.

0100

V4B.

0101

V5B.

0110

V6B.

0111

V7B.

1000

VCC.

1001

ALDO.

1010

Reserved.

1011

0x5555. Set the dedicated bits for digital interface communication self test function. When

conversion codes are read, Code 0x5555 is output as the conversion code of Channel B.

1100

Reserved.

[3:0]

CHA

Channel selection bits for ADC A Channels. Settings are the same as for ADC B.

0x0

R/W

0000

V0A.

0001

V1A.

0010

V2A.

0011

V3A.

0100

V4A.

0101

V5A.

0110

V6A.

0111

V7A.

1000

VCC.

1001

ALDO.

1010

Reserved.

1011

0xAAAA. Set the dedicated bits for digital interface communication self test function. When

conversion codes are read, Code 0xAAAA is read out as the conversion code of Channel A.

1100

Reserved.

Channel Selection bits for ADC A

Channels

1100: Res erved.

1011: 0XAAAA.

1010: Res erved.

...

10: V2A.

1: V1A.

0: V0A.

Channel Selection bits for ADC B

Channels

1100: Res erved.

1011: 0x5555.

1010: Res erved.

...

10: V2B.

1: V1B.

0: V0B.

[15:9] Addressing (R/W)

[3:0] CHA (R/W)

[8] RESERVED

[7:4] CHB (R/W)

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