| công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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TUSB8041A bảng dữ liệu(PDF) 21 Page - Texas Instruments |
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TUSB8041A bảng dữ liệu(HTML) 21 Page - Texas Instruments |
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21 / 57 page ![]() 21 TUSB8041A www.ti.com SLLSEW3 – AUGUST 2017 Product Folder Links: TUSB8041A Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated 8.4.4 SMBus Slave Operation When the SMBus interface mode is enabled, the TUSB8041A supports read block and write block protocols as a slave-only SMBus device. The TUSB8041A slave address is 1000 1xyz, where: • x is the state of GANGED/SMBA2/HS_UP pin at reset, • y is the state of FULLPWRMGMTz/SMBA1/SS_UP pin at reset, and • z is the read/write bit; 1 = read access, 0 = write access. If the TUSB8041A is addressed by a host using an unsupported protocol it will not respond. The TUSB8041A waits indefinitely for configuration by the SMBus host and will not connect on the upstream port until the SMBus host indicates configuration is complete by clearing the CFG_ACTIVE bit. For details on SMBus requirements, refer to the System Management Bus Specification. |
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