EC3201S datasheet(4/9 Pages) E-CMOS

4 / 9 page

EC3201S

1A, 1.5MHz, Synchronous

Step Down DC/DC Converter

E-CMOS Corp. (www.ecmos.com.tw)

5E12N-Rev. F001

4/9

Electrical Characteristics

(Vin = 5V, Vout= 1.8V, L = 2.2uH, Cout = 10uF, TA = 25°C, unless otherwise specified)

PARAMETER

Symbol

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Supply Voltage

Vin

2.5

5.5

Output Voltage Line Regulation

∆Vout

Vin = 2.5V to 5.5V

−3

Output Voltage Load Regulation

VLR

−3

Reference Voltage

VREF

For adjustable Vout

0.588

0.6

0.612

Output Range (Adjustable Voltage)

Vout

Vin = 2.5V to 5.5V

−3

Shutdown Current

VEN = 0V

0.1

µA

Quiescent Current

VEN = Vin,

VFB = VREF × 1.1

No Switching

110

µA

SW Leakage Current

ILEAK

VEN = 0V,

VSW = 0V or Vin

−1

µA

PMOSFET On Resistance*

RDSONP

ISW = 100mA

250

mΩ

NMOSFET On Resistance*

RDSONN

ISW = −100mA

200

mΩ

PMOSFET Current Limit*

ILIM

Duty cycle = 100%

Current Pulse Width <

1ms

Oscillator Frequency

FOSC

1.2

1.5

1.8

MHz

Thermal Shutdown Threshold*

160

°C

EN High Level Input Voltage

VENH

−40°C ≤ TA ≤ 85°C

1.5

EN Low Level Input Voltage

VENL

−40°C ≤ TA ≤ 85°C

0.4

EN Input Current

IEN

VEN = 0V to Vin

−1

µA

* Guaranteed by design not for test.

Note 1: Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are

stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the

operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect

device reliability.

Note 2: θJA is measured in the natural convection at TA = 25°C on a low effective single layer thermal conductivity test

board of JEDEC 51-3 thermal measurement standard. Pin 2 of TSOT23-5 packages is the case position for θJC measurement.

Measured at the exposed pad of the package.

Note 3: The device is not guaranteed to function outside its operating conditions.

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