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Product data sheet

Rev. 03 — 7 February 2005

3 of 15

Philips Semiconductors

74LVC2G86

Dual 2-input exclusive-OR gate

6.

Functional diagram

7.

Pinning information

7.1 Pinning

Fig 1.

Logic symbol

Fig 2.

IEC logic symbol

Fig 3.

Logic diagram (one driver)

mna737

1A

1B

1Y

2

1

7

2A

2B

2Y

6

5

3

mna738

7

= 1

= 1

2

1

3

6

5

mna040

Y

B

A

Fig 4.

Pin configuration TSSOP8 and

VSSOP8

Fig 5.

Pin configuration XSON8

86

1A

1B

1Y

2Y

2B

GND

2A

001aab836

1

2

3

4

6

5

8

7

86

2B

1Y

2A

2Y

1B

1A

GND

001aab837

36

27

18

45

Transparent top view