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WM8978GEFL/V bảng dữ liệu(PDF) 46 Page - Wolfson Microelectronics plc

tên linh kiện WM8978GEFL/V
Giải thích chi tiết về linh kiện  STEREO CODEC WITH SPEAKER DRIVER
PDF  78 Pages
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WM8978GEFL/V bảng dữ liệu(HTML) 46 Page - Wolfson Microelectronics plc

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WM8978
Product Preview
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PP Rev 1.7 January 2005
46
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
7
LOUT2ZC
0
Speaker volume zero cross enable:
1 = Change gain on zero cross only
0 = Change gain immediately
6
LOUT2MUTE
0
Left speaker output mute:
0 = Normal operation
1 = Mute
5:0
LOUT2VOL
111001
Left speaker output volume:
000000 = -57dB
...
111001 = 0dB
...
111111 = +6dB
R54
LOUT2 (SPK)
Volume
control
8
SPKVU
Not latched
LOUT2 and ROUT2 volumes do not
update until a 1 is written to SPKVU
(in reg 54 or 55)
7
ROUT2ZC
0
Speaker volume zero cross enable:
1 = Change gain on zero cross only
0 = Change gain immediately
6
ROUT2MUTE
0
Right speaker output mute:
0 = Normal operation
1 = Mute
5:0
ROUT2VOL
111001
Right speaker output volume:
000000 = -57dB
...
111001 = 0dB
...
111111 = +6dB
R55
ROUT2 (SPK)
Volume
control
8
SPKVU
Not latched
LOUT2 and ROUT2 volumes do not
update until a 1 is written to SPKVU
(in reg 54 or 55)
Table 35 Speaker Volume Control
ZERO CROSS TIMEOUT
A zero-cross timeout function is also provided so that if zero cross is enabled on the input or output
PGAs the gain will automatically update after a timeout period if a zero cross has not occurred. This
is enabled by setting SLOWCLKEN. The timeout period is dependent on the clock input to the digital
and is equal to 2
21 * input clock period.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R7
Additional
Control
0
SLOWCLKEN
0
Slow clock enable. Used for both the
jack insert detect debounce circuit and
the zero cross timeout.
0 = slow clock disabled
1 = slow clock enabled
Table 36 Timeout Clock Enable Control
OUT3/OUT4 MIXERS AND OUTPUT STAGES
The OUT3/OUT4 pins can provide an additional stereo line output, a mono output, or a pseudo
ground connection for headphones. There is a dedicated analogue mixer for OUT3 and one for
OUT4 as shown in Figure 19.
The OUT3 and OUT4 output stages are powered from SPKVDD and SPKGND. The individually
controllable outputs also incorporate an optional 1.5x boost and level shifing stage.



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