LM89 datasheet(18/20 Pages) NSC

18 / 20 page

3.0 Applications Hints (Continued)

3.2 PCB LAYOUT for MINIMIZING NOISE

In a noisy environment, such as a processor mother board,

layout considerations are very critical. Noise induced on

traces running between the remote temperature diode sen-

sor and the LM89 can cause temperature conversion errors.

Keep in mind that the signal level the LM89 is trying to

measure is in microvolts. The following guidelines should be

followed:

DD should be bypassed with a 0.1µF capacitor in par-

allel with 100pF. The 100pF capacitor should be placed

as close as possible to the power supply pin. A bulk

capacitance of approximately 10µF needs to be in the

near vicinity of the LM89.

A 2.2nF diode bypass capacitor is required to filter high

frequency noise. Place the 2.2nF capacitor as close as

possible to the LM89’s D+ and D− pins. Make sure the

traces to the 2.2nF capacitor are matched.

Ideally, the LM89 should be placed within 10cm of the

Processor diode pins with the traces being as straight,

short and identical as possible. Trace resistance of 1

Ω

can cause as much as 1˚C of error. This error can be

compensated by using the Remote Temperature Offset

Registers, since the value placed in these registers will

automatically be subtracted from or added to the remote

temperature reading.

Diode traces should be surrounded by a GND guard ring

to either side, above and below if possible. This GND

guard should not be between the D+ and D− lines. In the

event that noise does couple to the diode lines it would

be ideal if it is coupled common mode. That is equally to

the D+ and D− lines.

Avoid routing diode traces in close proximity to power

supply switching or filtering inductors.

Avoid running diode traces close to or parallel to high

speed digital and bus lines. Diode traces should be kept

at least 2cm apart from the high speed digital traces.

If it is necessary to cross high speed digital traces, the

diode traces and the high speed digital traces should

cross at a 90 degree angle.

The ideal place to connect the LM89’s GND pin is as

close as possible to the Processors GND associated

with the sense diode.

Leakage current between D+ and GND should be kept

to a minimum. One nano-ampere of leakage can cause

as much as 1˚C of error in the diode temperature read-

ing. Keeping the printed circuit board as clean as pos-

sible will minimize leakage current.

Noise coupling into the digital lines greater than 400mVp-p

(typical hysteresis) and undershoot less than 500mV below

GND, may prevent successful SMBus communication with

the LM89. SMBus no acknowledge is the most common

symptom, causing unnecessary traffic on the bus. Although

the SMBus maximum frequency of communication is rather

low (100kHz max), care still needs to be taken to ensure

proper termination within a system with multiple parts on the

bus and long printed circuit board traces. An RC lowpass

filter with a 3db corner frequency of about 40MHz is included

on the LM89’s SMBCLK input. Additional resistance can be

added in series with the SMBData and SMBCLK lines to

further help filter noise and ringing. Minimize noise coupling

by keeping digital traces out of switching power supply areas

as well as ensuring that digital lines containing high speed

data communications cross at right angles to the SMBData

and SMBCLK lines.

20041517

FIGURE 11. Ideal Diode Trace Layout

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