FC7630 SP FIXED- MULTI-OUTPUT REGULATORS

PARAMETER

SYMBOL

RATINGS

UNITS

REMARK

20

20

0.5

1.5

+150

0 ~ +125

V

-

V

A

W

°C

°C

-

-

No Heatsink

-

-

Topr

ABSOLUTE MAXIMUM RATINGS

DC Input Voltage

Disable Input Voltage

Output Current

Power Dissipation

Junction Temperature

Operating Temperature

Parameter

Min

Typ

Max

Unit

Condition

Output Voltage 1

Line Regulation 1,2

Load Regulation 1, 2

Line Regulation 3

Saturation Voltage in Reset

Condition

Output Voltage 2

I 1=10mA,

O

7.5V<

1< 14V

5mA <

1< 500mA

7.5V<

1< 14V

10.5V <

< 18V

1,2= 200mA

V2

IN

5mA <

1 < 500mA

5mA <

2< 500mA

13V <V 3< 18V

= 100mA

IN

I3

O

I6= 5mA

I 2=10mA,

O

10.5V<

2< 18V

5mA <

2< 500mA

5.0

4.9

-

-

-

-

7.84

7.7

5.2

5.3

50

80

100

160

120

0.4

8.16

8.3

V

mV

V

ELECTRICAL CHARACTERISTICS

(Refer to test circuit V 1=7.5V,

2=10.5V, T = 25°C, unless otherwise specified)

IN

J

V

IN

Symbol

V1

O

DV 1,2

O

DV 1,2

O

DV3

O

VrL

V2

O

5.1

5.1

-

0.1

-

-

8

8

Dropout Output Voltage 1,2

Output Voltage 3

Load Regulation 3

Reset Pulse Delay

Leakage Current Pin 6

Output Voltage Thermal Drift

Short Circuit Output Current

Disable Voltage High

Disable Voltage Low

Disable Bias Current

Junction Temperature for TSD

Quiescent Current

Reset Threshold Voltage

Reset Threshold Hysteresis

Vd1,2

V3

O

I 1,2=500mA,

O

Vsys= 13V,

= 100mA

I3

O

5mA <

3 < 1A

Cd= 100nF, Note 1

V6= 10V

0°C < T < +125°C, Note 2

J

V 1=7.5V,

2= 10.5V

IN

Output 2 Active

Output 2 Disabled

0V < Vdis < 7V

Note 2

I1

K= V 1

O

Note 1

2.5

12.3

250

-

10

-

1.6

-

0.8

2

-

2

V

V

-

11.7

-

-

-

-

-

2.0

-

-100

-

-

K -0.4

20

-

12

-

25

-

100

-

-

-

-

145

-

V

DV3

O

Trd

IrH

STt

Isc 1,2

VdisH

VdisL

Idis

Ttsd

Iq

Vr

Vrth

ms

µA

ppm/°C

A

V

V

µA

°C

mA

V

mA

K -0.25

50

K -0.1

100

Notes:

1. To check the reset circuit ,the reset output is low to discharge the delay capacitor(=Cd). if it’s less than

-0.25V.

And the reset output is high when the delay capacitor voltage linearly increased by the interal current source(10µA)

if it’s more than

- 0.2V. The equations of delay time is same as below. Trd = (Cd X 2.5) / 10µA

2. These parameters, although guaranteed, are not 100% tested in production.

V1

O

V1

O

mV

mV

mV