AM27C256-150JC datasheet(7/12 Pages) AMD

7 / 12 page

AMD

2-38

Am27C256

Output OR-Tieing

To accommodate multiple memory connections, a two-

line control function is provided to allow for:

s Low memory power dissipation

s Assurance that output bus contention will not occur

It is recommended that

CE be decoded and used as the

primary device-selecting function, while

OE be made a

common connection to all devices in the array and con-

nected to the READ line from the system control bus.

This assures that all deselected memory devices are in

low-power standby mode and that the output pins are

only active when data is desired from a particular

memory device.

System Applications

During the switch between active and standby condi-

tions, transient current peaks are produced on the rising

and falling edges of Chip Enable. The magnitude of

these transient current peaks is dependent on the out-

put capacitance loading of the device. At a minimum, a

0.1-

µF ceramic capacitor (high frequency, low inherent

inductance) should be used on each device between

VCC and VSS to minimize transient effects. In addition, to

overcome the voltage drop caused by the inductive ef-

fects of the printed circuit board traces on EPROM ar-

rays, a 4.7-

µF bulk electrolytic capacitor should be used

between VCC and VSS for each eight devices. The loca-

tion of the capacitor should be close to where the power

supply is connected to the array.

MODE SELECT TABLE

VPP

Outputs

Read

VIL

DOUT

Output Disable

VIH

High-Z

Standby (TTL)

VIH

High-Z

Standby (CMOS)

VCC + 0.3 V

High-Z

Program

VIL

VIH

VPP

DIN

Program Verify

VIH

VIL

VPP

DOUT

Program Inhibit

VIH

VPP

High-Z

Manufacturer

Code

VIL

01H

Device Code

VIL

VIH

10H

Auto Select

(Note 3)

Mode

Pins

Notes:

1. VH = 12.0 V + 0.5 V

2. X = Either VIH or VIL

3. A1–A8 = A10–A14 = VIL

4. See DC Programming Characteristics for VPP voltage during programming.

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