GD25Q41B datasheet(13/46 Pages) ELM

13 / 46 page

Rev.1.1

46 -

http://www.elm-tech.com

GD25Q41BxIGx Uniform Sector Dual and Quad Serial Flash

NOTE:

(1) Write Status Register (01H)

Normally, Write Status Register (01H) is used to write both lower status register and higher status register;

However, if CS# goes up at the eighth bit of the data byte, the data byte would be written as lower byte of

status register, without changing the higher byte of status register.

(2) Dual Output data

IO0 = (D6, D4, D2, D0)

IO1 = (D7, D5, D3, D1)

(3) Dual Input Address

IO0 = A22, A20, A18, A16, A14, A12, A10, A8 A6, A4, A2, A0, M6, M4, M2, M0

IO1 = A23, A21, A19, A17, A15, A13, A11, A9 A7, A5, A3, A1, M7, M5, M3, M1

(4) Quad Output Data

IO0 = (D4, D0, …..)

IO1 = (D5, D1, …..)

IO2 = (D6, D2, …..)

IO3 = (D7, D3,…..)

(5) Quad Input Address

IO0 = A20, A16, A12, A8, A4, A0, M4, M0

IO1 = A21, A17, A13, A9, A5, A1, M5, M1

IO2 = A22, A18, A14, A10, A6, A2, M6, M2

IO3 = A23, A19, A15, A11, A7, A3, M7, M3

(6) Fast Read Quad I/O Data

IO0 = (x, x, x, x, D4, D0,…)

IO1 = (x, x, x, x, D5, D1,…)

IO2 = (x, x, x, x, D6, D2,…)

IO3 = (x, x, x, x, D7, D3,…)

Command Name

Byte 1

Byte 2

Byte 3

Byte 4

Byte 5

Byte 6

n-Bytes

High Performance Mode A3H

dummy

Erase Security

Registers (9)

44H

A23-A16

A15-A8

A7-A0

Program Security

Registers (9)

42H

A23-A16

A15-A8

A7-A0

(D7-D0)

Read Security

Registers (9)

48H

A23-A16

A15-A8

A7-A0

dummy

(D7-D0)

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