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HT24LC02A bảng dữ liệu(PDF) 4 Page - Holtek Semiconductor Inc

tên linh kiện HT24LC02A
Giải thích chi tiết về linh kiện  CMOS 2K 2-Wire Serial EEPROM
PDF  10 Pages
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nhà sản xuất  HOLTEK [Holtek Semiconductor Inc]
Trang chủ  http://www.holtek.com
Logo HOLTEK - Holtek Semiconductor Inc

HT24LC02A bảng dữ liệu(HTML) 4 Page - Holtek Semiconductor Inc

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Rev. 1.10
4
January 16, 2014
HT24LC02A
Functional Description
Pin Function
• Serialclock–SCL
TheSCLinputisusedforpositiveedgeclock
dataintoeachEEPROMdeviceandnegativeedge
clockdataoutofeachdevice.
• Serialdata–SDA
The SDA pin is bidirectional for serial data
transfer.Thepinisopen-draindrivenandmaybe
wired-ORwithanynumberofotheropen-drainor
opencollectordevices.
• Writeprotect–WP
TheHT24LC02Ahasawriteprotectpinthat
provides hardwaredataprotection.Thewrite
protectpinallowsnormalread/writeoperations
whenconnectedtoVSSorleftfloating.Whenthe
writeprotectpinisconnectedtoVCC,thewrite
protectionfeatureisenabledandoperatesasshown
inthefollowingtable.
WP Pin Status
Protect Array
VCC
Full Array (2K)
VSS or floating
Normal Read/Write Operations
Memory Organization
• HT24LC02A,2KSerialEEPROM
Internallyorganizedwith2568-bitwords,the2K
requiresan8-bitdatawordaddressforrandom
wordaddressing.
Device Operations
• Clockanddatatransition
Datatransfermaybeinitiatedonlywhenthebusis
notbusy.Duringdatatransfer,thedatalinemust
remainstablewhenevertheclocklineishigh.
Changesindatalinewhiletheclocklineishigh
willbeinterpretedasaSTARTorSTOPcondition.
• Startcondition
Ahigh-to-lowtransitionofSDAwithSCLhigh
isastartconditionwhichmustprecedeanyother
command (refer to Start and Stop Definition
Timingdiagram).
• Stopcondition
Alow-to-hightransitionofSDAwithSCLhighis
astopcondition.Afterareadsequence,thestop
commandwillplacetheEEPROMinastandby
powermode(refertoStartandStopDefinition
TimingDiagram).
• Acknowledge
All addresses and data words are serially
transmittedtoandfromtheEEPROMin8-bit
words.TheEEPROMsendsazerotoacknowledge
thatithasreceivedeachword.Thishappensduring
theninthclockcycle.
SC L
SD A
Da ta a ll ow ed
to c hange
A ddr e ss or
a ck now l edge
va li d
St op
co nd it io n
St ar t
c ondi ti on
No A CK
st at e
Device Addressing
The2KEEPROMdevicesallrequirean8-bitdevice
addresswordfollowingastartconditiontoenablethe
chipforareadorwriteoperation.Thedeviceaddress
wordconsistofamandatoryone,zerosequencefor
thefirstfourmostsignificantbits(refertothediagram
showingtheDeviceAddress).Thisiscommontoall
theEEPROMdevice.
The 8th bit of device address is the read/write
operationselectbit.Areadoperationisinitiatedifthis
bitishighandawriteoperationisinitiatedifthisbit
islow.
Ifthecomparisonofthedeviceaddresssucceedthe
EEPROMwilloutputazeroatACKbit.Ifnot,the
chipwillreturntoastandbystate.
R/ W
10
0
00
De vi ce A ddr es s
10
Write Operations
• Bytewrite
Awriteoperationrequiresan8-bitdataword
addressfollowingthedeviceaddresswordand
acknowledgment.Uponreceiptofthisaddress,
the EEPROM will again respond with a zero
andthenclockinthefirst8-bitdataword.After
receivingthe8-bitdataword,theEEPROMwill
outputazeroandtheaddressingdevice,suchasa
microcontroller,mustterminatethewritesequence
withastopcondition.AtthistimetheEEPROM
entersaninternally-timedwritecycletothenon-
volatilememory.Allinputsaredisabledduringthis
writecycleandEEPROMwillnotresponduntil
thewriteiscompleted(refertoBytewritetiming).



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