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37C672 bảng dữ liệu(PDF) 39 Page - SMSC Corporation

tên linh kiện 37C672
Giải thích chi tiết về linh kiện  ENHANCED SUPER I/O CONTROLLER WITH FAST IR
PDF  173 Pages
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nhà sản xuất  SMSC [SMSC Corporation]
Trang chủ  http://www.smsc.com
Logo SMSC - SMSC Corporation

37C672 bảng dữ liệu(HTML) 39 Page - SMSC Corporation

Back Button 37C672 Datasheet HTML 35Page - SMSC Corporation 37C672 Datasheet HTML 36Page - SMSC Corporation 37C672 Datasheet HTML 37Page - SMSC Corporation 37C672 Datasheet HTML 38Page - SMSC Corporation 37C672 Datasheet HTML 39Page - SMSC Corporation 37C672 Datasheet HTML 40Page - SMSC Corporation 37C672 Datasheet HTML 41Page - SMSC Corporation 37C672 Datasheet HTML 42Page - SMSC Corporation 37C672 Datasheet HTML 43Page - SMSC Corporation Next Button
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Enhanced Super I/O Controller with Fast IR
Datasheet
SMSC FDC37C672
Page 39
Rev. 10-29-03
PRELIMINARY DATASHEET
transfer request signal of up to the time taken for the FDC to read the last 16 bytes from the FIFO. The
host must tolerate this delay.
6.5.4
Result Phase
The generation of FINT determines the beginning of the result phase. For each of the commands, a
defined set of result bytes has to be read from the FDC before the result phase is complete. These bytes
of data must be read out for another command to start.
RQM and DIO must both equal "1" before the result bytes may be read. After all the result bytes have
been read, the RQM and DIO bits switch to "1" and "0" respectively, and the CB bit is cleared, indicating
that the FDC is ready to accept the next command.



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