VL53L0X datasheet(19/40 Pages) STMICROELECTRONICS

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DocID029104 Rev 1

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VL53L0X

Control interface

Figure 15. VL53L0X data format (write)

As data is received by the slave it is written bit by bit to a serial/parallel register. After each

data byte has been received by the slave, an acknowledge is generated, the data is then

stored in the internal register addressed by the current index.

During a read message, the contents of the register addressed by the current index is read

out in the byte following the device address byte. The contents of this register are parallel

loaded into the serial/parallel register and clocked out of the device by the falling edge of

SCL.

Figure 16. VL53L0X data format (read)

At the end of each byte, in both read and write message sequences, an acknowledge is

issued by the receiving device (that is, the VL53L0X for a write and the host for a read).

A message can only be terminated by the bus master, either by issuing a stop condition or

by a negative acknowledge (that is, not pulling the SDA line low) after reading a complete

byte during a read operation.

The interface also supports auto-increment indexing. After the first data byte has been

transferred, the index is automatically incremented by 1. The master can therefore send

data bytes continuously to the slave until the slave fails to provide an acknowledge or the

master terminates the write communication with a stop condition. If the auto-increment

feature is used the master does not have to send address indexes to accompany the data

bytes.

Figure 17. VL53L0X data format (sequential write)

VL53L0X acknowledges

Acknowledge from

VL53L0X

ADDRESS[7:0]

INDEX[7:0]

DATA[7:0]

Ac P

0x52 (write)

Start

Stop

valid address

ADDRESS[7:0]

INDEX[7:0]

Ac P

0x52 (write)

ADDRESS[7:0]

DATA[7:0]

0x53 (read)

ADDRESS[7:0]

INDEX[7:0]

0x52 (write)

DATA[7:0]

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