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ALD810021 bảng dữ liệu(PDF) 2 Page - Advanced Linear Devices |
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ALD810021 bảng dữ liệu(HTML) 2 Page - Advanced Linear Devices |
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2 / 17 page ![]() ALD8100XX/ALD9100XX SUPERCAPACITOR Advanced Linear Devices, Inc. 2 of 17 AUTO BALANCING (SAB) MOSFET ARRAY FAMILY balancing generally contribute additional continuous power dissi- pation due to linear currents at all supercapacitor voltage levels, whereas SAB MOSFET leakages decrease exponentially with de- creased supercapacitor voltages. In many cases, the additional leakage charge loss is near zero. UNDERSTANDING SUPERCAPACITOR AUTO BALANCING USING SAB™ MOSFETS The principle behind the SAB MOSFET in balancing supercapacitors is simple. It is based on the natural threshold char- acteristics of a MOSFET device. The threshold voltage of a MOSFET is the voltage at which a MOSFET turns on and starts to conduct a current. The drain current of the MOSFET, at or below its threshold voltage, is an exponential function of its gate voltage. Hence, for small changes in the MOSFET’s gate voltage, its drain- source on-current can vary greatly, by orders of magnitude. ALD’s SAB MOSFETs are designed to take advantage of this fundamen- tal device characteristic. SAB MOSFETs are connected in the Vt mode, meaning that the Gate-to-Source and the Drain-to-Source terminals of each MOSFET are always connected. In this mode VGS is always equal to VDS and when this joint terminal is connected across a supercapacitor, it is also referred to as an Input Voltage, VIN. Each SAB MOSFET has a well defined Drain-to-Source Current, IDS(ON), for different values of VIN Voltages. This current is also referred to as the Out- put Current, IOUT, of the SAB MOSFET. SAB MOSFETs can be connected in parallel or in series, to suit the desired leakage current characteristics, in order to charge-balance an array of supercapacitors connected in series. The array of com- bined SAB MOSFETs and supercapacitors would be automatically self-regulating with various leakage mismatches and environmen- tal temperature changes. The SAB MOSFETs can also be used entirely in the subthreshold mode, meaning the SAB MOSFET is used at min., nominal and max. operating voltages in voltage ranges below its specified threshold voltage. With the ALD8100xx/ALD9100xx family, the threshold voltage Vt of an SAB MOSFET is defined as its drain-gate source voltage at a drain-source ON current, IDS(ON) = 1µA, when its gate and drain terminals are connected together (VGS = VDS). This voltage is specified as xx, where the threshold voltage is in 0.10V increments. Two examples are: the ALD810025 features a precise threshold voltage of Vt = 2.500V at IDS(ON) = 1µA and the AL ºD810017 has Vt = 1.700V at IDS(ON) = 1µA. As all ALD8100xx/ALD9100xx devices operate similarly, with lin- ear voltage shifts, an ALD810025 is used as an illustration of its characteristics. At voltages below its threshold voltage, the ALD810025 rapidly turns off at a rate of approximately one decade of current per 104mV of voltage drop. Hence, at VIN = 2.396V, the ALD810025 IOUT is 0.1µA. At VIN = 2.292V, its IOUT becomes 0.01µA. When VIN drops further to 2.188V, its IOUT becomes 0.001µA. It should be apparent that at VIN ≤ 2.10V, the ALD810025 IOUT ≤ 0.00014µA, which is near zero when compared to 1µA at VIN = 2.50V. At VIN below 1.9V, the SAB MOSFET Output Current, IOUT, goes to essentially zero (~70pA). The IOUT ≤ 0.00014µA is controlled and repeatable for different units from various produc- tion batches. This exponential relationship between the SAB MOSFET’s VIN and IOUT can be an important consideration in replacing certain supercapacitor charge balancing applications currently using fixed resistors, operational amplifier circuits or other forms of charge bal- ancing. These other conventional charge-balancing methods con- tinue to dissipate a significant amount of current, even after the voltage across the supercapacitors has dropped, because the cur- rent dissipated is a linear function, rather than an exponential func- tion, of the supercapacitor voltage (I = V/R). For supercapacitor series stacks with more than two cells, the challenge of leakage balancing becomes even more onerous. With most other passive or active circuits that offer charge balanc- ing, active power is still being consumed even if the supercapacitor voltage falls much below its operating voltage. For a four-cell supercapacitor stack, for example, this translates into a 2.0V x 4 ~= 8.0V power supply for an IC charge-balancing circuit. As the number of cells increase, adding components to the charge bal- ancing circuit, increased circuit complexity and power dissipation becomes a greater challenge. A supercapacitor stack using the SAB MOSFET charge-balancing method, on the other hand, would not cause extra power dissipation when the number of cells increase. This method provides an exponentially decreasing amount of charge loss with time, and helps preserve, by far, the greatest amount of charge on each of the supercapacitors. If VIN of the ALD810025 is greater than its Vt threshold voltage, its Output Current, IOUT, behavior has the opposite near-exponential effect. At VIN = 2.60V, for example, the ALD810025 IOUT increases tenfold to 10µA. Similarly, IOUT becomes 100µA at a VIN of 2.74V, and 300µA at VIN of 2.84V. (See Table 1.) As IOUT changes rapidly with the applied VIN, the SAB MOSFET device acts like a voltage limiting regulator with self-adjusting cur- rent levels. When the SAB MOSFET is connected across a supercapacitor cell, the total leakage current equals the two in com- bination automatically compensate and correct for each other. Consider the case when two supercapacitor cells are connected in series, each with an SAB MOSFET connected across it, charged by a power supply to a voltage equal to 2 x VS. If the top supercapacitor has a higher internal leakage current than the bottom supercapacitor, the voltage VS(top) across it tends to drop lower than that of the bottom supercapacitor. The SAB MOSFET IOUT across the top supercapacitor, sensing this voltage drop, drops off rapidly. Meanwhile, the bottom supercapacitor VS(bottom) voltage tends to rise, as VS(bottom) = (2 x VS) - VS(top). This tendency for the voltage rise also increases VIN voltage of the SAB MOSFET across the bottom supercapacitor. This increased VIN voltage would cause the IOUT of the bottom SAB MOSFET to increase rapidly as well. The excess leakage current of the top supercapacitor would now leak across the bottom SAB MOSFET, reducing the voltage rise tendency of the lower supercapacitor. With this automatic self-regulating mechanism, the top supercapacitor voltage tends to rise while the bottom supercapacitor voltage tends to drop, creating simultaneously opposing actions to the supercapacitor leakage currents. With appropriate design and selection of a specific SAB MOSFET device for a given pair of supercapacitors, it is now possible to regulate and balance two series-connected supercapacitors with essentially no extra leakage current, since the SAB MOSFET only conducts the difference in leakage current between the two supercapacitors. Likewise, the case of the bottom supercapacitor having a higher leakage current than that of the top supercapacitor works in similar fashion, where the bottom supercapacitor voltage tends to drop, compensated by the tendency of the top supercap voltage to drop as well, effected by the top SAB MOSFET. This SAB MOSFET charge balancing scheme also works with four, eight or more supercapacitors in series by using an equivalent number of SAB MOSFETs in multiple package(s). Ambient temperature increases cause supercapacitor leakage cur- rents to increase. The SAB MOSFET threshold voltage is reduced ALD8100XX/ALD9100XX FAMILY GENERAL DESCRIPTION (cont.) |
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