LM5145 datasheet(49/67 Pages) TI1

49 / 67 page

BST

PGND

SS/TRK

COMP

AGND

VIN = 6 V to 48 V

LM5145

VOUT

SYNC

SYNCOUT

SYNCIN

EN/UVLO

VIN

ILIM

PGOOD

SYNC

Out

VCC

CIN

RILIM

CVCC

CBST

CSS

RFB2

RFB1

RC2

CC2

CC1

RC1

CC3

RRT

CILIM

1 H

0.1 F

22 pF

47 nF

5 u 2.2 F

10 nF

2.2 F

CVIN

249

0.1 F

18.2 k

6.81 k

470 pF

2.32 k

100

33.2 k

2.7 nF

GND

LM10011SD

GND

IDAC_OUT

VDD

VIDA

VIDC

VIDB

VIDS

SET

MODE

RSET

182 k

TMS320C667x

VCNTL[3]

VCNTL[0]

VCNTL[1]

VCNTL[2]

KeyStone¥

Multicore

DSP

CVDD

DVDD18

RPU1:4

3.3 V

Core voltage

0.9 V ± 1.1 V

Step resolution

6.4 mV

4 x 100 F

COUT

VAUX = 8 V to 13 V

LM5145

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SNVSAI4 – JUNE 2017

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9.2.4 Design 4 – Powering a Multicore DSP From a 24-V or 48-V Rail

Figure 85 shows the schematic diagram of a 10-A synchronous buck regulator for a DSP core voltage supply.

Figure 85. Application Circuit #4 With LM5145 DSP Core Voltage Supply

9.2.4.1 Design Requirements

For this design example, the intended input, output, and performance parameters are listed in Table 12.

Table 12. Design Parameters

DESIGN PARAMETER

VALUE

Input voltage range (steady-state)

6 V to 48 V

Input transient voltage (peak)

55 V

Output voltage and current

0.9 V to 1.1 V, 10 A

Output voltage regulation

±1%

Load transient peak voltage deviation, 10-A step

< 120 mV

Switching frequency

300 kHz

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