HD404848FS datasheet(33/125 Pages) HITACHI

33 / 125 page

HD404849 Series

but the accuracy of the contents of the accumulator, B register, W register, X/SPX register, Y/SPY register,

carry flag, and serial data register cannot be guaranteed.

Stop mode

Oscillator

Internal

clock

STOP instruction execution

tres ≥ tRC (stabilization period)

tres

RESET

STOPC

Figure 16 Timing of Stop Mode Cancellation

Watch Mode: In watch mode, the clock function (timer A) using the X1 and X2 oscillator and the LCD

function operate, but other function operations stop. Therefore, the power dissipation in this mode is the

second least to stop mode, and this mode is convenient when only clock display is used. In this mode, the

OSC

1 and OSC2 oscillator stops, but the X1 and X2 oscillator operates. The MCU enters watch mode if the

STOP instruction is executed in active mode when TMA3 = 1, or if the STOP or SBY instruction is

executed in subactive mode.

Watch mode is terminated by a

RESET input or a timer-A/INT

0 interrupt request.

For details of

RESET

input, refer to the Stop Mode section. When terminated by a timer-A/

INT

0 interrupt request, the MCU

enters active mode if LSON = 0, or subactive mode if LSON = 1. After an interrupt request is generated,

the time required to enter active mode is t

RC for a timer A interrupt, and TX (where T + tRC < TX < 2T + tRC)

for an INT

0 interrupt, as shown in figures 17 and 18.

Operation during mode transition is the same as that at standby mode cancellation (figure 15).

HD404848FS bảng dữ liệu(PDF) 33 Page - Hitachi Semiconductor