ADC12010EVAL datasheet(7/22 Pages) NSC

7 / 22 page

AC Electrical Characteristics

Unless otherwise specified, the following specifications apply for AGND = DGND = DR GND = 0V, V

A =VD = +5V, VDR =

+3.0V, PD = 0V, V

REF = +2.0V, fCLK = 10 MHz, tr =tf = 3 ns, CL = 25 pF/pin. Boldface limits apply for TA =TJ =TMIN to

MAX: all other limits TA =TJ = 25˚C (Notes 7, 8, 9, 12)

Symbol

Parameter

Conditions

Typical

(Note 10)

Limits

(Note 10)

Units

(Limits)

CLK1

Maximum Clock Frequency

MHz (min)

CLK2

Minimum Clock Frequency

100

kHz

Clock High Time

ns (min)

Clock Low Time

ns(min)

CONV

Conversion Latency

Clock

Cycles

Data Output Delay after Rising

CLK Edge

DR = 2.5V

16.8

ns (max)

DR = 3.0V

16.8

ns (max)

Aperture Delay

1.2

Aperture Jitter

ps rms

DIS

Data outputs into TRI-STATE

Mode

4ns

Data Outputs Active after

TRI-STATE

4ns

Power Down Mode Exit Cycle

0.1 µF cap on pins 30, 31,32

500

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is

functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed

specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test

conditions.

Note 2: All voltages are measured with respect to GND = AGND = DGND = 0V, unless otherwise specified.

Note 3: When the input voltage at any pin exceeds the power supplies (that is, VIN < AGND, or VIN > VA), the current at that pin should be limited to 25 mA. The

50 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 25 mA to two.

Note 4: The absolute maximum junction temperature (TJmax) for this device is 150˚C. The maximum allowable power dissipation is dictated by TJmax, the

junction-to-ambient thermal resistance (

θJA), and the ambient temperature, (TA), and can be calculated using the formula PDMAX=(TJmax - TA )/θJA. In the 32-pin

LQFP,

θJA is 79˚C/W, so PDMAX = 1,582 mW at 25˚C and 823 mW at the maximum operating ambient temperature of 85˚C. Note that the power consumption of

this device under normal operation will typically be about 180 mW (160 typical power consumption + 20 mW TTL output loading). The values for maximum power

dissipation listed above will be reached only when the device is operated in a severe fault condition (e.g. when input or output pins are driven beyond the power

supply voltages, or the power supply polarity is reversed). Obviously, such conditions should always be avoided.

Note 5: Human body model is 100 pF capacitor discharged through a 1.5 k

Ω resistor. Machine model is 220 pF discharged through 0Ω.

Note 6: The 235˚C reflow temperature refers to infrared reflow. For Vapor Phase Reflow (VPR), the following Conditions apply: Maintain the temperature at the top

of the package body above 183˚C for a minimum 60 seconds. The temperature measured on the package body must not exceed 220˚C. Only one excursion above

183˚C is allowed per reflow cycle.

Note 7: The inputs are protected as shown below. Input voltage magnitudes above VA or below GND will not damage this device, provided current is limited per

(Note 3). However, errors in the A/D conversion can occur if the input goes above VA or below GND by more than 100 mV. As an example, if VA is 4.75V, the full-scale

input voltage must be

≤4.85V to ensure accurate conversions.

20051607

Note 8: To guarantee accuracy, it is required that |VA–VD| ≤ 100 mV and separate bypass capacitors are used at each power supply pin.

Note 9: With the test condition for VREF = +2.0V (4VP-P differential input), the 12-bit LSB is 977 µV.

Note 10: Typical figures are at TA =TJ = 25˚C, and represent most likely parametric norms. Test limits are guaranteed to National’s AOQL (Average Outgoing Quality

Level).

Note 11: Integral Non Linearity is defined as the deviation of the analog value, expressed in LSBs, from the straight line that passes through positive and negative

full-scale.

Note 12: Timing specifications are tested at TTL logic levels, VIL = 0.4V for a falling edge and VIH = 2.4V for a rising edge.

Note 13: Optimum performance will be obtained by keeping the reference input in the 1.8V to 2.2V range. The LM4051CIM3-ADJ (SOT-23 package) is

recommended for this application.

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