9SQL4954 datasheet(1/20 Pages) IDT

tên linh kiện	9SQL4954

Giải thích chi tiết về linh kiện	4-output CK420BQ Derivative

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nhà sản xuất	IDT [Integrated Device Technology]

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DATASHEET

9SQL4954 DECEMBER 12, 2016

1

4-output CK420BQ Derivative

9SQL4954

Description

The 9SQL4954 is a member of IDT's 'Lite' family of server

clocks. It generates 4 100MHz outputs that exceed the

requirements of the CK420BQ CPU/SRC clocks. Each output

has its own OE# pin for clock management and supports 2

different spread spectrum levels in addition to spread off. It

also provides a copy of the 25MHz internal XO. The

9SQL4954 supports PCIe Common Clock (CC) and

Independent Reference Clock (IR) architectures.

Recommended Application

PCIe Gen1, Gen2, Gen3, Gen4 Server Clock

Output Features

• 4 -100MHz Low-power HCSL (LP-HCSL) CPU/SRC pairs

• Integrated terminations for 85Ω Zout

• 1 - 3.3V LVCMOS REF output w/Wake-On-LAN (WOL)

support

Key Specifications

• BCLK outputs:

• Cycle-to-cycle jitter <50ps

• Output-to-output skew <50ps

• PCIe Gen1, Gen2, Gen3, Gen4 CC compliant

• PCIe Gen2, Gen3 IR compliant

• QPI/UPI compliant

• SAS12G compliant (SSC off)

• 12k-20M phase jitter <2ps rms (SSC off)

• REF output:

• Phase jitter <200fs rms (SSC off)

• ±50ppm frequency accuracy on all clocks

Features/Benefits

• Direct connection to 85 transmission lines; saves 16

resistors and 27mm2 compared to standard HCSL

• 142mW typical power consumption; eases thermal

concerns @ 1/10 the power of CK420BQ

• Contains default configuration; SMBus interface not

required for device operation

• OE# pins; support BCLK power management

• 25MHz input frequency; standard crystal frequency

• 25MHz REF output; eliminates XO from boar

• Pin/SMBus selectable 0%, -0.25% or -0.5% spread on DIF

outputs; minimize EMI and phase jitter for each application

• BCLK outputs blocked until PLL is locked; clean system

start-up

• Two selectable SMBus addresses; multiple devices can

easily share an SMBus segment

• Space saving 32-pin 5x5mm VFQFPN; minimal board

space

Block Diagram

y

XIN/CLKIN_25

X2

vSS_EN_tri

^CKPWRGD_PD#

SDATA_3.3

REF

vOE(3:0)#

SCLK_3.3

vSADR

BCLK0

4

SSC

Capable

PLL

Control

Logic

BCLK3

BCLK2

BCLK1

Số phần tương tự - 9SQL4954

nhà sản xuất	tên linh kiện	bảng dữ liệu	Giải thích chi tiết về linh kiện
Renesas Technology Corp	9SQL4954	424Kb / 30P	3.3V PCIe® Gen1–5 and UPI Clock Generator Family February 19, 2020
	9SQL4954CNLGI	424Kb / 30P	3.3V PCIe® Gen1–5 and UPI Clock Generator Family February 19, 2020
	9SQL4954CNLGI8	424Kb / 30P	3.3V PCIe® Gen1–5 and UPI Clock Generator Family February 19, 2020

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