ZGP323L datasheet(8/105 Pages) ZILOG

8 / 105 page

Z8 GPTM OTP MCU Family

Product Specification

PS023702-1004

P r e l i m i n a r y

General Description

–

Port 1: 0–3 pull-up transistors

–

Port 1: 4–7 pull-up transistors

–

Port 2: 0–7 pull-up transistors

–

EPROM Protection

–

WDT enabled at POR

The mask option pull-up transistor has a typical equivalent

resistance of 200 K

Ω ±50% at V

CC=3 V and 450 KΩ ±50% at

VCC=2 V.

General Description

The Z8 GPTM OTP MCU Family is an OTP-based member of the MCU family of

infrared microcontrollers. With 237B of general-purpose RAM and up to 32KB of

OTP, ZiLOG®’s CMOS microcontrollers offer fast-executing, efficient use of mem-

ory, sophisticated interrupts, input/output bit manipulation capabilities, automated

pulse generation/reception, and internal key-scan pull-up transistors.

The Z8 GPTM OTP MCU Family architecture (Figure 1) is based on ZiLOG’s 8-bit

microcontroller core with an Expanded Register File allowing access to register-

mapped peripherals, input/output (I/O) circuits, and powerful counter/timer cir-

cuitry. The Z8® offers a flexible I/O scheme, an efficient register and address

space structure, and a number of ancillary features that are useful in many con-

sumer, automotive, computer peripheral, and battery-operated hand-held applica-

tions.

There are three basic address spaces available to support a wide range of config-

urations: Program Memory, Register File and Expanded Register File. The regis-

ter file is composed of 256 Bytes (B) of RAM. It includes 4 I/O port registers, 16

control and status registers, and 236 general-purpose registers. The Expanded

To unburden the program from coping with such real-time problems as generating

complex waveforms or receiving and demodulating complex waveform/pulses, the

Z8 GP OTP MCU offers a new intelligent counter/timer architecture with 8-bit and

16-bit counter/timers (see Figure 2). Also included are a large number of user-

selectable modes and two on-board comparators to process analog signals with

separate reference voltages.

All signals with an overline, “ ”, are active Low. For example,

B/W, in which WORD is active Low, and B/W, in which BYTE is

active Low.

Power connections use the conventional descriptions listed in Table 2.

Note:

ZGP323L bảng dữ liệu(PDF) 8 Page - Zilog, Inc.

ZGP323L bảng dữ liệu(HTML) 8 Page - Zilog, Inc.

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL